Cyclone FX Hardware
The following is an overview of the physical features and interfaces of Cyclone FX programmers. Many of these interfaces are also labeled on the underside of the plastic case.
Figure: Cyclone Top View

Touchscreen LCD
The LCD Touchscreen displays information about the Cyclone’s configuration and the programming process, and also allows the user to navigate the Cyclone’s menus. The location of the Touchscreen LCD is shown in Figure: Cyclone Top View.
LED Indicators
The LED indicators for Error or Success will illuminate depending on the results of the programming process and provide a clear visual indication of the results. The location of the LED Indicators is shown in Figure: Cyclone Top View.
Start Button
The Start Button can be used to begin the programming process manually, provided that the Cyclone is properly configured. The location of the Start Button is shown in Figure: Cyclone Top View.
Access Panel
The Access Panel can easily be opened to allow the user to connect/disconnect ribbon cables from the headers, or to configure the Cyclone’s Power Jumpers to select one of the available Power Management setups. The location of the Access Panel is shown in Figure: Cyclone Top View; a layout of the headers and jumpers beneath the Access Panel is shown in Figure: Cyclone Target Headers & Power Jumpers.
Figure: Cyclone Right Side View

Cyclone System Power
The Cyclone programmer requires a regulated 6V DC Center Positive power supply with 2.5/5.5mm female plug. Cyclones derive power from the Power Jack located on the right end of the unit. The location of Cyclone System Power is shown in Figure: Cyclone Right Side View.
RS232 Communication (Serial Port)
The Cyclone provides a DB9 Female connector to communicate with a host computer through RS232 communication (115200 Baud, 8 Data bits, No parity, 1 Stop bit). The location of the Serial Port is shown in Figure: Cyclone Right Side View.
Ethernet Communication
The Cyclone provides a standard RJ45 socket to communicate with a host computer through the Ethernet port (10/100 BaseT). The location of the Ethernet Port is shown in Figure: Cyclone Right Side View.
USB Communications
The Cyclone provides a USB connector for Universal Serial Bus communications between the Cyclone and the host computer. The Cyclone is a USB 2.0 Full-Speed compliant device. The location of the USB Port is shown in Figure: Cyclone Right Side View.
Wi-Fi Communications (Cyclone FX Only)
Hardware for wireless communications (Wi-Fi IEEE 802.11b/g/n protocols, 2.4GHz frequency band) is built into the Cyclone FX, Rev. C and later. The user can configure through the Cyclone’s on-screen menu. For configuration via Control GUI, see Encryption Keys Tab. Information on usage, including how to connect and disconnect to WiFi networks, is described in Wi-Fi Configuration and Connection.
Electromechanical Relays
Inside the Cyclone programmer, two electromechanical relays are used to cycle target power. The specifications of the relays are as follows:
- Maximum switched power: 30W or 125 VA
- Maximum switched current: 1A
- Maximum switched voltage: 150VDC or 300VAC
- UL Rating: 1A at 30 VDC
- 1A at 125 VAC
PEmicro only recommends switching DC voltages up to 24 Volts.
Figure: Cyclone Front Side View

Power Connectors
The Cyclone programmers provide a Target Power Supply Input Jack and a Target Power Supply Output Jack with 2.5/5.5 mm Pin Diameter. The power jacks are connected or disconnected by two electromechanical relays. When connected, the Center Pin of the Target Power Supply Input Jack is connected to the Center Pin of the Target Power Supply Output Jack. When disconnected, both terminals of the Target Power Supply Output Jack are connected to GND via a 1W, 100 Ohm resistor. The locations of Target Power In and Target Power Out are shown in Figure: Cyclone Front Side View.
Reset Button
The Reset Button performs a hard reset of the Cyclone system. The location of the Reset Button is shown in Figure: Cyclone Front Side View.
Figure: Cyclone Rear-Side View (FX Shown)

USB Expansion Port (Cyclone FX Only)
The location of the USB Expansion Port is shown in Figure: Cyclone Front Side View. The USB Expansion Port supports use of a bar code scanner, which can provide the user with helpful features during the programming process. For detailed information on how to use the barcode scanner with a Cyclone FX, please read Using A Barcode Scanner.
SDHC Port (Cyclone FX Only)
Note
-
USB Expansion port is only present on Cyclone FX programmers.
-
The SDHC port is only present and active on Cyclone FX programmers (and legacy Cyclone LC models, with license).
The SDHC port allows the user to store programming images that are, individually or collectively, larger than the Cyclone’s internal memory. It also makes it quicker and more convenient to swap programming images. PEmicro offers certified SDHC cards on our website at pemicro.com. The location of the SDHC Port is shown in Figure: Cyclone Rear Side View.
Programming images are managed on the SD card in exactly the same way as they are in the Cyclone’s internal memory. Please see Managing Multiple Programming Images for more information about using the Manage Images utility.
To view detailed information about the status of the SDHC card/port, tap the icon bar at the top of the touchscreen menu. This status can provide you with relevant information if you are encountering any difficulty while trying to use an SDHC card.
SDHC cards with a memory capacity up to 4GB are supported. Cards with a larger capacity may work but have not been validated by PEmicro.
Programming Control Port
The Programming Control Port is a 10-pin interface which allows external hardware the ability to launch programming and read success, failure, and busy/idle status from the Cyclone through standard I/O signals. This allows simple automated control of the Cyclone without using one of the communications interfaces (Serial, USB, Ethernet).
The port can be configured to work with I/O signals from 1.6V-5.5V. The signal port provides a 5V power output which can be used to power external electronics.
Figure: Port and Pin 1 Location

Pin-Out And Definitions
Below is the pin-out of the programming control port and the definitions of the signals:
Figure: Programming Control Port Pin-Out

| Pin# | Signal Name | Description |
|---|---|---|
| 1 | PWR_5V_OUT | The Cyclone can provide a constant 5V, 100mA output on this pin which may be used to power external circuitry. |
| 2 | GND | Should be connected to the GND of any controlling circuitry. |
| 3 | VCCIO_IN | This voltage is used to drive the output pins of the programming control port and is used as a reference for the input pins. This voltage can be from 1.6v-5.5v. This pin may be directly connected to the PWR_5V_OUT output pin of the Programming Control Port, if 5v operation of the port is desired. This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
| 4 | CPORT_IN1 | Falling edge sensitive pin which will clear the status (Success or Error) LED of the Cyclone (if ~SENSE_IN is low and triggering is enabled with the “controlporttriggerenable” property in the Cyclone). This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
| 5 | EXTRA_IN21 | Currently unused. |
| 6 | ~START_IN | Falling edge sensitive pin which will launch programming of the currently selected image on the Cyclone (if ~SENSE_IN is low and triggering is enabled with the “controlporttriggerenable” property in the Cyclone). This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
| 7 | ~SUCCESS_OUT | A low value indicates the most recent programming operation was successful. A high value means that there is no success to report (programming is on-going, an error occurred, no programming launch has occurred, too much time has passed since last programming operation, etc). This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
| 8 | ~ERROR_OUT | A low value indicates the most recent programming operation failed. A high value means that there is no error to report (programming is on-going, programming was successful, no programming launch has occurred, too much time has passed since last programming operation, etc). This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
| 9 | ~IDLE_OUT | A low indicates the Cyclone is IDLE and can accept a programming launch operation. A high indicates the Cyclone is currently running a programming operation. This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
| 10 | ~SENSE_IN | An input which must be driven low to enable the programming control port inputs. This signal has an internal 100K Ohm pullup resistor and a 470 Ohm series resistor. |
Powering the Programming Control Port
To allow the Cyclone to drive the port outputs to show the current programming state, and to allow the Cyclone to properly interpret input signals on the port, the Programming Control Port I/O voltage must be set. This is done by connecting an external voltage of 1.6v-5.5v to the VCCIO_IN pin of the port. This VCCIO_IN pin may be directly connected to the PWR_5V_OUT output pin of the Programming Control Port if 5v operation of the port is desired. If connecting to external circuitry which runs at a different voltage, such as 3v, simply connect the desired voltage to the VCCIO_IN pin.
Once powered, the outputs (~SUCCESS_OUT, ~ERROR_OUT, and ~IDLE_OUT) become actively driven.
Enabling Triggering on the Programming Control Port
The Programming Control Port allows programming to be launched from the Programming Control Port. For this to happen, the triggering must previously have been enabled in the settings of the Cyclone (see below) and the port must be detected as active.
The Programming Control Port is considered active if an appropriate voltage is applied to the VCCIO_IN pin and the ~SENSE_IN signal is driven low.
To enable triggering in the settings of the Cyclone, the “controlporttriggerenable” property in the Cyclone must have been enabled at some point (this setting is stored in the Cyclone once set). This can be done via the Cyclone Control SDK, Cyclone Control Console, or Cyclone Control GUI.
For the Cyclone Control Console, an example command which reads this property for a Cyclone named “Universal_PEM0927F6” is:
cycloneControlConsole -cyclone=Universal_PEM0927F6 -getproperty=hardwareproperties,0,controlporttriggerenable
For the Cyclone Control Console, an example command which sets this property for a Cyclone named “Universal_PEM0927F6” is:
cycloneControlConsole -cyclone=Universal_PEM0927F6 -setproperty=hardwareproperties,0,controlporttriggerenable,1
In the Cyclone Control GUI, this property may be accessed by opening the Cyclone and choosing the “Properties” tab:
Figure: Properties Tab

To set the property, highlight it and click the … button on that line. Enter the value 1 to enable and 0 to disable triggering
Figure: Setting The Property

The triggering should then show as active (note that ~SENSE_IN will also need to be driven low for triggering to work):
Figure: Active Triggering

Timing on the Programming Control Port
In its default idle state, the Cyclone will drive the ~IDLE_OUT signal low. When a falling edge is detected on the ~START_IN signal, the ~SUCCESS_OUT and ~ERROR_OUT signals will be driven high and then the ~IDLE_OUT signal will be driven high (BUSY). Once programming is complete, the ~SUCCESS_OUT and ~ERROR_OUT signals will be driven to reflect the result of programming and then the ~IDLE_OUT signal will be driven back low.
A safe mechanism to launch programming on the Cyclone if controlled by edge sensitive circuitry:
- Wait for ~IDLE_OUT to be low
- Drive the ~START_IN signal low then back high (this edge is detected in hardware on the Cyclone and won’t be missed)
- Wait for a negative edge on ~IDLE_OUT (i.e. wait for the Cyclone to go to BUSY then IDLE)
- Read the ~SUCCESS_OUT and ~ERROR_OUT signals to determine result
A safe mechanism to launch programming on the Cyclone without using edge sensitive circuitry (polled method):
- Wait for ~IDLE_OUT to be low
- Drive the ~START_IN signal low then back high (this edge is detected in hardware on the Cyclone and won’t be missed)
- Wait 100mS for the Cyclone to recognize the ~START_IN falling edge on this port and to set the ~IDLE_OUT signal
- Wait for ~IDLE_OUT to go back low
- Read the ~SUCCESS_OUT and ~ERROR_OUT signals to determine result
Push Button / LED Example Circuit
The following example circuit has a push button that triggers programming. The three LEDs indicate the Success, Failure, and Idle/Busy lines.
Figure: Example Circuit

After setting up the above connections, pushing the button will trigger programming and the Cyclone state can be seen on the LEDs.
Note
No separate license is required to use this port.
An example of how to use Raspberry Pi to launch programming via the Programming Control Port is shown at:
https://www.pemicro.com/blog/index.cfm?post_id=222
Optional Oscillator (Universal Models Only, for MON08 Targets)
Cyclone programmers with MON08 support ("Universal" models only) provide a software configurable 9.8304MHz or 4.9152 MHz oscillator clock signal to Pin 13 of the MON08 Connector. The user may use this clock signal to overdrive the target RC or crystal circuitry. If this signal is not used, just leave Pin 13 of the target MON08 header unconnected.
Please note that if the target already uses an oscillator as its clock, the Cyclone will NOT be able to overdrive it. The clock should have sufficient drive to be used with a target system even if the target system has an RC circuit or crystal connected.
Cyclone Time / Real Time Clock
Cyclone programmers are equipped with a Real Time Clock (RTC) module designed to keep accurate timing even when the Cyclone is turned off.
The Date & Time are displayed on the home screen. Date/Time settings can be configured by navigating to the following menu using the touchscreen display:
Main Menu / Configure Cyclone Settings / Configure Time Settings
For more information on the available configuration options, see Configure Time Settings (Cyclone Time / Real Time Clock).
Power Jumper Settings
The Power Jumpers must be set differently for various power management options that the Cyclone offers. If the target is being powered independently of the Cyclone, all pins in the Power Jumpers header must instead be left unpopulated. To reveal the Power Jumpers header, lift the access panel on the left end of the Cyclone. The location is indicated as Power Jumpers in Figure: Cyclone Target Headers & Power Jumpers. Please see Target Power Management for the correct jumper settings for the Cyclone’s power management options. A quick guide to these settings is also located on the underside label of the Cyclone.
Debug Connectors
When purchasing a standard Cyclone LC or advanced Cyclone FX programmer, the user is able to choose between two part numbers, each corresponding to a different level of device support. See the sticker on the underside of the Cyclone to determine the PEmicro part# for your specific Cyclone programmer.
ARM-only Cyclone Headers
- PEmicro Part# CYCLONE-LC-ARM or CYCLONE-FX-ARM. Supports ARM Cortex devices only, so this programmer provides one shrouded, un-keyed, 0.100-inch pitch dual row 0.025-inch square header, and two shrouded, keyed 0.050-inch pitch dual row mini headers.
"Universal" Cyclone Headers
- PEmicro Part# CYCLONE-LC-UNIV or CYCLONE-FX-UNIV. Supports ARM Cortex devices and additionally supports target connections to many 8-/16-/32-bit NXP architectures, so this programmer provides six shrouded, un-keyed, 0.100-inch pitch dual row 0.025-inch square headers, and two shrouded, keyed 0.050-inch pitch dual row mini headers.
To reveal the headers and connect/disconnect ribbon cables, lift the access panel on the left end of the Cyclone. Each header is designated for one or more specific target architectures, as indicated in the figure below.
The headers shown below are the same for the Cyclone LC and FX lines of programmers. The layout of the "Universal" versions is shown on the left, and the layout of the "ARM" versions is shown on the right.
Note
The Renesas adapter mentioned in the figure is only compatible with the Cyclone FX line of programmers.
Figure: Cyclone FX Target Headers & Power Jumpers (Universal and ARM models)

Mechanical drawings are shown below whose dimensions are representative of the pin size and spacing of these headers.
Note
The number of pins depicted in the mechanical drawings below may differ from any particular Cyclone header; the drawings are provided simply to demonstrate overall pin size and spacing.
Figure: 20-Pin Un-Keyed Header Dimensions

Figure: Mini 10-Pin and Mini 20-Pin Keyed Header Dimensions

Target Headers For ARM-Only Cyclones (Part# CYCLONE-LC-ARM and CYCLONE-FX-ARM)
The ARM models of PEmicro's Cyclone LC and FX programmers feature 3 ports labeled A-C.
PORT A: 10-Pin Keyed Mini Connector (ARM Cortex devices)
JTAG Pin Assignments
The Cyclone provides a keyed 10-pin 0.050-inch pitch double row connector for ARM targets. The location of this header is indicated as PORT A in Figure: Cyclone Target Headers & Power Jumpers. The 10-pin keyed mini connector pin definitions for JTAG mode are as follows:
10-Pin Keyed Mini Connector (JTAG)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS | PIN 2 |
| PIN 3 | GND | TCK | PIN 4 |
| PIN 5 | GND | TDO | PIN 6 |
| PIN 7 | NC | TDI | PIN 8 |
| PIN 9 | JTAG_MOD/NC* | RESET | PIN 10 |
Note
* PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
Cyclone programmers also support SWD Mode. This replaces the JTAG connection with a clock and single bi-directional data pin.
SWD Mode Pin Assignments
10-Pin Keyed Mini Connector (SWD)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS/SWDIO | PIN 2 |
| PIN 3 | GND | TCK/SWCLK | PIN 4 |
| PIN 5 | GND | NC* | PIN 6 |
| PIN 7 | NC | NC* | PIN 8 |
| PIN 9 | JTAG_MOD/NC** | RESET | PIN 10 |
Note
* The pin is reserved for internal use within the PEmicro interface.
Note
** PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
PORT B: 20-Pin Keyed Mini Connector (ARM Cortex devices)
JTAG Mode Pin Assignments
The Cyclone provides a keyed 20-pin 0.050-inch pitch double row connector for ARM targets. The location of this header is indicated as PORT B in Figure: Cyclone Target Headers & Power Jumpers. The 20-pin keyed mini connector pin definitions for JTAG mode are as follows:
20-Pin Keyed Mini Connector (JTAG)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS | PIN 2 |
| PIN 3 | GND | TCK | PIN 4 |
| PIN 5 | GND | TDO | PIN 6 |
| PIN 7 | NC | TDI | PIN 8 |
| PIN 9 | JTAG_MOD/NC** | RESET | PIN 10 |
| PIN 11 | NC | NC* | PIN 12 |
| PIN 13 | NC | NC* | PIN 14 |
| PIN 15 | GND | NC* | PIN 16 |
| PIN 17 | GND | NC* | PIN 18 |
| PIN 19 | GND | NC* | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
Note
** PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
SWD Mode Pin Assignments
Cyclone programmers also support SWD Mode. This replaces the JTAG connection with a clock and single bi-directional data pin.
20-Pin Keyed Mini Connector (SWD)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS/SWDIO | PIN 2 |
| PIN 3 | GND | TCK/SWCLK | PIN 4 |
| PIN 5 | GND | NC* | PIN 6 |
| PIN 7 | NC | NC* | PIN 8 |
| PIN 9 | JTAG_MOD/NC** | RESET | PIN 10 |
| PIN 11 | NC | NC* | PIN 12 |
| PIN 13 | NC | NC* | PIN 14 |
| PIN 15 | GND | NC* | PIN 16 |
| PIN 17 | GND | NC* | PIN 18 |
| PIN 19 | GND | NC* | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
Note
** PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
PORT C: 20-Pin Debug Connector (ARM Cortex devices)
JTAG Mode Pin Assignments
The Cyclone provides a 20-pin 0.100-inch pitch double row connector for ARM targets. The location of this header is indicated as PORT C under Part# CYCLONE-FX-ARM in Figure: Cyclone Target Headers & Power Jumpers. The 20-pin standard connector pin definitions for JTAG mode are as follows:
20-Pin Standard Connector (JTAG)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | NC* | PIN 2 |
| PIN 3 | TRST | or NC GND | PIN 4 |
| PIN 5 | TDI | GND | PIN 6 |
| PIN 7 | TMS | GND | PIN 8 |
| PIN 9 | TCK | GND | PIN 10 |
| PIN 11 | NC* | GND | PIN 12 |
| PIN 13 | TDO | GND | PIN 14 |
| PIN 15 | RESET | GND | PIN 16 |
| PIN 17 | NC* | GND | PIN 18 |
| PIN 19 | NC* | GND | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
SWD Mode Pin Assignments
Cyclone programmers also support SWD Mode. This replaces the JTAG connection with a clock and single bi-directional data pin.
20-Pin Standard Connector (SWD)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | NC* | PIN 2 |
| PIN 3 | TRST | or NC* GND | PIN 4 |
| PIN 5 | NC* | GND | PIN 6 |
| PIN 7 | TMS/SWDIO | GND | PIN 8 |
| PIN 9 | TCK/SWCLK | GND | PIN 10 |
| PIN 11 | NC* | GND | PIN 12 |
| PIN 13 | NC* | GND | PIN 14 |
| PIN 15 | RESET | GND | PIN 16 |
| PIN 17 | NC* | GND | PIN 18 |
| PIN 19 | NC* | GND | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
Target Headers For Universal Cyclones (Part# CYCLONE-LC-UNIV and CYCLONE-FX-UNIVERSAL)
The Universal versions of the Cyclone LC and FX programmers feature 6 ports labeled A-H.
PORT A: 10-Pin Keyed Mini Connector (ARM Cortex devices, Infineon TriCore - DAP only)
JTAG Mode Pin Assignments
The Cyclone provides a keyed 10-pin 0.050-inch pitch double row connector for ARM targets. The location of this header is indicated as PORT A in Figure: Cyclone Target Headers & Power Jumpers. The 10-pin keyed mini connector pin definitions for JTAG mode are as follows:
10-Pin Keyed Mini Connector (JTAG)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS | PIN 2 |
| PIN 3 | GND | TCK | PIN 4 |
| PIN 5 | GND | TDO | PIN 6 |
| PIN 7 | NC | TDI | PIN 8 |
| PIN 9 | JTAG_MOD/NC* | RESET | PIN 10 |
Note
- PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
SWD Mode Pin Assignments
Cyclone programmers also support SWD Mode. This replaces the JTAG connection with a clock and single bi-directional data pin.
10-Pin Keyed Mini Connector (SWD)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS/SWDIO | PIN 2 |
| PIN 3 | GND | TCK/SWCLK | PIN 4 |
| PIN 5 | GND | NC* | PIN 6 |
| PIN 7 | NC | NC* | PIN 8 |
| PIN 9* | JTAG_MOD/NC** | RESET | PIN 10 |
Note
* The pin is reserved for internal use within the PEmicro interface.
Note
** PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
DAP Connector Pin Assignments (Target Board Has Dedicated DAP Connector Port)
Users whose target board does not have a dedicated DAP Connector should refer instead to Port H in Target Board Does Not Have Dedicated DAP Connector Port.
The keyed 10-pin 0.050-inch pitch double row connector of the CYCLONE-FX-UNIV model supports Infineon TriCore targets (AUDOTM TC1xx and AURIXTM TC2xx/TC3xx). The location of this header is indicated as PORT A in Figure: Cyclone Target Headers & Power Jumpers. The 10-pin keyed mini connector pin definitions for DAP connectors are as follows:
10-Pin Keyed Mini Connector DAP Pin Assignments
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | DAP1 | PIN 2 |
| PIN 3 | GND | DAP0 | PIN 4 |
| PIN 5 | GND | NC* | PIN 6 |
| PIN 7 | NC | NC* | PIN 8 |
| PIN 9 | NC* | RESET | PIN 10 |
Note
* The pin is reserved for internal use within the PEmicro interface.
PORT B: 20-Pin Keyed Mini Connector (ARM Cortex devices)
JTAG Mode Pin Assignments
The Cyclone provides a keyed 20-pin 0.050-inch pitch double row connector for ARM targets. The location of this header is indicated as PORT B in Figure: Cyclone Target Headers & Power Jumpers. The 20-pin keyed mini connector pin definitions for JTAG mode are as follows:
20-Pin Keyed Mini Connector JTAG Mode Pin Assignments
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS | PIN 2 |
| PIN 3 | GND | TCK | PIN 4 |
| PIN 5 | GND | TDO | PIN 6 |
| PIN 7 | NC | TDI | PIN 8 |
| PIN 9 | JTAG_MOD/NC** | RESET | PIN 10 |
| PIN 11 | NC | NC* | PIN 12 |
| PIN 13 | NC | NC* | PIN 14 |
| PIN 15 | GND | NC* | PIN 16 |
| PIN 17 | GND | NC* | PIN 18 |
| PIN 19 | GND | NC* | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
** PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
SWD Mode Pin Assignments
Cyclone programmers also support SWD Mode. This replaces the JTAG connection with a clock and single bi-directional data pin.
20-Pin Keyed Mini Connector SWD Mode Pin Assignments
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | TMS/SWDIO | PIN 2 |
| PIN 3 | GND | TCK/SWCLK | PIN 4 |
| PIN 5 | GND | NC* | PIN 6 |
| PIN 7 | NC | NC* | PIN 8 |
| PIN 9 | JTAG_MOD/NC** | RESET | PIN 10 |
| PIN 11 | NC | NC* | PIN 12 |
| PIN 13 | NC | NC* | PIN 14 |
| PIN 15 | GND | NC* | PIN 16 |
| PIN 17 | GND | NC* | PIN 18 |
| PIN 19 | GND | NC* | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
** PIN 9: Users of NXP i.MX processors are recommended to connect the JTAG_MOD signal to this pin to allow programming when secure JTAG is enabled. For all other processors, this pin should be left as NC.
PORT C: 14-Pin Debug Connector (MPC55xx-57xx, SPC5, DSC, S32 (Power))
The Cyclone provides a standard 14-pin 0.100-inch pitch dual row 0.025-inch square header for MPC55xx-57xx, DSC (MC56F8xxx), S32R, or STMicroelectronics’ SPC5 targets. The location of this header is indicated as PORT C in Figure: Cyclone Target Headers & Power Jumpers.
MPC55xx-57xx, SPC5, or S32 (Power) Pinout
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TDI | GND | PIN 2 |
| PIN 3 | TDO | GND | PIN 4 |
| PIN 5 | TCK | GND | PIN 6 |
| PIN 7 | NC | NC | PIN 8 |
| PIN 9 | RESET | TMS | PIN 10 |
| PIN 11 | VDDE7 | GND | PIN 12 |
| PIN 13 | RDY | JCOMP | PIN 14 |
DSC Pinout
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TDI | GND | PIN 2 |
| PIN 3 | TDO | GND | PIN 4 |
| PIN 5 | TCK | GND | PIN 6 |
| PIN 7 | NC | NC/KEY | PIN 8 |
| PIN 9 | RESET | TMS | PIN 10 |
| PIN 11 | TVCC | GND | PIN 12 |
| PIN 13 | NC* | TRST | PIN 14 |
Note
* The pin is reserved for internal use within the PEmicro interface.
BERG14-to-MICTOR38 Optional Connector
PEmicro offers a 14-pin BERG to 38-pin MICTOR adapter, sold separately, that may be used on Port C of the Cyclone. The PEmicro part number is BERG14-TO-MICTOR38.
Figure: BERG14-TO-MICTOR38 Adapter (Sold Separately)

PORT D: 26-Pin Debug Connector (ColdFire V2/3/4)
The Cyclone provides a standard 26-pin 0.100-inch pitch dual row 0.025-inch square header for ColdFire MCF52xx/53xx/54xx family of microprocessors. This port connects to the target hardware using either the ColdFire extension cable for synchronous ColdFire targets such as MCF5272 & MCF5206E (PEmicro part# CABLE-CF-ADAPTER, sold separately), or a standard 26-pin ribbon cable for asynchronous ColdFire targets (included). Please refer to each processor’s user manual to identify whether it is a synchronous or asynchronous interface. The location of this header is indicated as PORT D in Figure: Cyclone Target Headers & Power Jumpers.
ColdFire V2/3/4 Pinout
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | N/C | BKPT | PIN 2 |
| PIN 3 | GND | DSCLK | PIN 4 |
| PIN 5 | GND | NC* | PIN 6 |
| PIN 7 | RESET | DSI | PIN 8 |
| PIN 9 | TVCC | DSO | PIN 10 |
| PIN 11 | GND | PST3 | PIN 12 |
| PIN 13 | PST2 | PST1 | PIN 14 |
| PIN 15 | PST0 | DDATA3 | PIN 16 |
| PIN 17 | DDATA2 | DDATA1 | PIN 18 |
| PIN 19 | DDATA0 | GND | PIN 20 |
| PIN 21 | N/C | N/C | PIN 22 |
| PIN 23 | GND | CLK | PIN 24 |
| PIN 25 | TVCC | TA | PIN 26 |
Note
* The pin is reserved for internal use within the PEmicro interface.
The ColdFire adapter for Synchronous targets and ribbon cable for Asynchronous targets is pictured below:
Figure: ColdFire Adapter (part# CABLE_CF_ADAPTER (Rev. B), for synchronous ColdFire targets, sold separately)

Figure: ColdFire Ribbon Cable (for asynchronous ColdFire targets, included with Cyclone)

PORT E: 16-Pin Debug Connector (MON08)
The Cyclone provides a 16-pin 0.100-inch pitch double row connector for MON08 targets. The location of this header is indicated as PORT E in Figure: Cyclone Target Headers & Power Jumpers. The MON08 header adopts the standard pin-out from MON08 debugging with some modifications. The general pin-out is as follows:
MON08 Signals
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | NC* | GND | PIN 2 |
| PIN 3 | NC** | RST | PIN 4 |
| PIN 5 | NC* | IRQ | PIN 6 |
| PIN 7 | NC* | MON4 | PIN 8 |
| PIN 9 | NC* | MON5 | PIN 10 |
| PIN 11 | NC* | MON6 | PIN 12 |
| PIN 13 | OSC | MON7 | PIN 14 |
| PIN 15 | Vout | MON8 | PIN 16 |
Note
* The pin is reserved for internal use within the PEmicro interface.
** The pin is reserved for internal use within the PEmicro interface only when using an MR8 target.
Note
The pins labeled as MON04 - MON08 vary from device to device. To view the exact pinout for your specific MON08 part (e.g., 68HC908AB) the user may consult the NXP user manual for their device, or view the pinout in either the Cyclone Image Creation Utility or the PROG08SZ interface by selecting their specific device in the GUI.
PORT F: 6-Pin Debug Connector (RS08, HCS08, HC(S)12(X), S12Z, ColdFire +/V1, STM8 w/ adapter)
The Cyclone provides a standard 6-pin 0.100-inch pitch dual row 0.025-inch square header for ColdFire V1, S12Z, 68(S)12(X), 68HCS08, RS08, and STMicroelectronics’ STM8 targets. The location of this header is indicated as PORT F in Figure: Cyclone Target Headers & Power Jumpers. The header uses the NXP standard pin configuration, listed here for reference:
ColdFire V1, 68(S)12(X), 68HCS08, and RS08 Signals
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | BKGD | GND | PIN 2 |
| PIN 3 | NC | RESET | PIN 4 |
| PIN 5 | NC | TVCC | PIN 6 |
S12Z Signals
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | BKGD | GND | PIN 2 |
| PIN 3 | PDO* | RESET | PIN 4 |
| PIN 5 | PDOCLK* | TVCC | PIN 6 |
Note
* indicates optional signal
6-Pin STM8 Signals
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | SWIM** | GND | PIN 2 |
| PIN 3 | NC* | RESET | PIN 4 |
| PIN 5 | NC* | TVCC | PIN 6 |
Note
* The pin is reserved for internal use within the PEmicro interface.
** All the signals are direct connect except the SWIM line which requires a 680 Ohm pull-up
PEmicro also offers a separate STM8 adapter (part# CU-CUFX-STM8-ADPT) that can be plugged into the 6-pin header of the Cyclone; see Figure: STM8 Adapter. The adapter offers 4 pins signals from an ERNI connector.
4-Pin STM8 Signals
(Requires STM8 Adapter, sold separately)
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | SWIM | PIN 2 |
| PIN 3 | GND | RESET | PIN 4 |
Figure: STM8 Adapter
Figure: STM8 Adapter Connected to Cyclone
Figure: STM8 Adapter 6-Pin Header
PORT G: 10-Pin Debug Connector (Power MPC5xx/8xx)
The Cyclone Universal provides a standard 10-pin 0.100-inch pitch dual row 0.025-inch square header for Power MPC5xx/8xx BDM targets. The location of this header is indicated as PORT G in Figure: Cyclone Target Headers & Power Jumpers.
Power MPC5xx/8xx BDM Pinout
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | VFLS0* | SRESET | PIN 2 |
| PIN 3 | GND | DSCK | PIN 4 |
| PIN 5 | GND | VFLS1* | PIN 6 |
| PIN 7 | HRESET | DSDI | PIN 8 |
| PIN 9 | TVCC | DSDO | PIN 10 |
Note
* The pin is reserved for internal use within the PEmicro interface, no connection needed.
PORT H: 20-Pin Debug Connector (ARM Cortex devices, Infineon TriCore - DAP only)
JTAG Mode Pin Assignments
The Cyclone provides a 20-pin 0.100-inch pitch double row connector for ARM targets. The location of this header is indicated as PORT H under Part# CYCLONE-FX-UNIV in Figure: Cyclone Target Headers & Power Jumpers. The 20-pin standard connector pin definitions for JTAG mode are as follows:
20-Pin Standard Connector JTAG Mode Pin Assignments
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | NC | PIN 2 |
| PIN 3 | TRST | or NC* GND | PIN 4 |
| PIN 5 | TDI | GND | PIN 6 |
| PIN 7 | TMS | GND | PIN 8 |
| PIN 9 | TCK | GND | PIN 10 |
| PIN 11 | NC* | GND | PIN 12 |
| PIN 13 | TDO | GND | PIN 14 |
| PIN 15 | RESET | GND | PIN 16 |
| PIN 17 | NC* | GND | PIN 18 |
| PIN 19 | NC* | GND | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
SWD Mode Pin Assignments
Cyclone programmers also support SWD Mode. This replaces the JTAG connection with a clock and single bi-directional data pin.
20-Pin Standard Connector SWD Mode Pin Assignments
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | NC* | PIN 2 |
| PIN 3 | TRST | or NC* GND | PIN 4 |
| PIN 5 | NC* | GND | PIN 6 |
| PIN 7 | TMS/SWDIO | GND | PIN 8 |
| PIN 9 | TCK/SWCLK | GND | PIN 10 |
| PIN 11 | NC* | GND | PIN 12 |
| PIN 13 | NC* | GND | PIN 14 |
| PIN 15 | RESET | GND | PIN 16 |
| PIN 17 | NC* | GND | PIN 18 |
| PIN 19 | NC* | GND | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
DAP Connector Pin Assignments (Target Board Does Not Have Dedicated DAP Connector Port)
Users whose target board has a dedicated DAP Connector should instead refer to Port A in Target Board Has Dedicated DAP Connector Port.
If the user’s target board does not have a dedicated DAP connector port, the user may choose to wire pins to the 20-pin 0.100-inch pitch double row connector of the CYCLONE-FX-UNIV model (can be used with Infineon TriCore targets AUDOTM TC1xx and AURIXTM TC2xx/TC3xx). The location of this header is indicated as PORT H in Figure: Cyclone Target Headers & Power Jumpers. The 20-pin standard connector pin definitions for DAP connectors are as follows:
20-Pin Standard Connector JTAG Mode Pin Assignments
| Left Pin | Left Signal | Right Signal | Right Pin |
|---|---|---|---|
| PIN 1 | TVCC | NC | PIN 2 |
| PIN 3 | TRST | or NC* GND | PIN 4 |
| PIN 5 | NC* | GND | PIN 6 |
| PIN 7 | DAP1 | GND | PIN 8 |
| PIN 9 | DAP0 | GND | PIN 10 |
| PIN 11 | NC* | GND | PIN 12 |
| PIN 13 | NC* | GND | PIN 14 |
| PIN 15 | RESET | GND | PIN 16 |
| PIN 17 | NC* | GND | PIN 18 |
| PIN 19 | NC* | GND | PIN 20 |
Note
* The pin is reserved for internal use within the PEmicro interface.
Note
Pin3 - TRST needs to be at high power on reset release for enabling DAP, so shorting TRST to VDD may be advised.
PORT C & PORT E (Renesas Adapter)
PEmicro also offers a separate Renesas adapter (part# CUFX-RENESAS-ADPT) that can be plugged into the 14-pin and 16-pin headers (PORT C & PORT E) of the Cyclone; the figures below show the adapter from a few angles. The adapter connects to the target via a 14-pin ribbon cable.
Note
The user should take care to properly align the 2 adapter headers over the Cyclone’s PORT C and PORT E pins before pressing the adapter down to install.
Rev. D of the adapter features 2 headers on the top side, labeled J1 and J2. The labels are visible in the first Figure below. The J2 header should be used for RL78 devices. Otherwise the J1 header should be used. Revs. A-C feature only one header on the top.
Renesas Pin Signals (Requires Renesas Adapter, sold separately)
Signal definition depends on the specific Renesas architecture selected. Please view the appropriate Renesas device datasheet.
Figure: Renesas Adapter Top
Figure: Renesas Adapter Bottom
Figure: Renesas Adapter Attached
Ribbon Cable
Cyclone FX programmers communicate with the target through ribbon cables. The ribbon cables for standard debug connectors have a 0.100-inch centerline dual row socket IDC assembly (not keyed). The ribbon cables for 10- and 20-pin mini debug connectors have a 0.050-inch centerline dual row socket IDC assembly (keyed). The ribbon cables are designed such that the Cyclone’s Debug Connector has the same pinout as the Target Header, i.e., Pin 1 of the Cyclone’s Debug Connector is connected to Pin 1 of the Target Header. As an example, Figure: Ribbon Cable Example Diagram, When Looking Into IDC Socket sketches the connection mechanism (looking down into the sockets) for a 14-pin ribbon cable. Ribbon cables for other supported architectures use a similar scheme, but may have more or fewer pins.
Figure: Ribbon Cable Example Diagram, When Looking Into IDC Socket
