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Change Algorithm Address for SPC56
Jerome V. Mar 22, 2017 at 05:14 AM (05:14 hours)
Staff: Takao Y.

  • Hello All,

    I'm using a SPC560B60 and the CFlash Algorithm address is from 0x0 to 0x100000.

    In my case, my application address is from 0x0 to 0x80 4000.
    Is it possible to modify the address range of the SPC56 algorithm in order to dump all the memory and to re-program the complete module ?

    Thanks a lot for your help.



  • Greetings,

    What you are talking about is Data Flash from 0x80_0000 to 0x80_C000 that you wish to program as well.

    So you have 2 options, you could first select the CFLASH algorithm and program your S19 which only programs up to address 0x10_0000 then switch to DFLASH algorithm to program the same S19 to finish the rest of your binary. OR I could generate a CFLASH_DFLASH combined algorithm so you can do it one go. Note though that the combined algorithm can be risky because if you call the ERASE command it will erase both CFLASH and DFLASH. The separate algorithm will only erase or only program the section it covers so there is more control over what you erase, keep, or program.

    Let me know which method you wish to pursue.

    Takao Yamada

  • Hello Takao,

    Thanks a lot for your answer.

    The problem is your C Flash algorithm program from 0x0 to 0x10 0000.
    In my case, we use the memory from 0x0 to 0x80 0000 for the C Flash.
    And actually with this algorithm, I'm not able to program this memory and my CRC is not correct.

    Is it possible to generate one algorithm in order to program the C Flash (0x0 to 0x80 0000) and D Flash (0x80 0000 to 0x80 C000).

    Thanks a lot

  • Greetings,

    So you are saying you cannot program the CFLASH and DFLASH using separate algorithms right now? If so, then combining the algorithms will not improve your situation. What error are you getting when programming CFLASH? What happens if you program DFLASH do you get errors as well?

    Takao Yamada

  • I'm able to program both flash.

    My problem is that the C Flash address range is not correct for me.
    In the algorithm, the address range for the C Flash is 0x0 to 0x100000.
    But in my case, the address range is 0x0 to 0x800000.
    And my application calculates a CRC between 0x0 to 0x800000 and actually, I'm not able to do this and to program my module.

    And I would like to program all the application memory directly with only one SAP and one algorithm.
    That's why, I would like one algorithm with address range 0x0 to 0x80C0000.
    Is is possible to generate this algorithm please ?

    Thanks a lot,

  • Greetings,

    So if you are able to program both flashes, then why do you still have problems? Do you care about shadow and test sectors?

    I could combine CFLASH and DFLASH but I cannot combine with shadow and test sectors. They require a completely different method of programming due to its one-time programmable (OTP) nature.

    Are you sure your CRC is only between 0x0 to 0x80_0000? Address 0x80_0000 is the beginning of DFLASH.

    Takao Yamada

  • Yes the CRC is between 0x0 to 0x7FFFFC. And the CRC is written between 0x7FFFFC to 0x7FFFFF.

    So it is not possible to have an algorithm with address range between 0x0 to 0x80C000 ?

  • Greetings,

    You cannot write to address 0x7F_FFFC to 0x7F_FFFF. That is reserved memory. Are we looking at the same device? This is SPC560B60, which has...

    0x0000_0000 to 0x000F_0000 code flash memory,
    0x0010_0000 to 0x001F_FFFF reserved memory,
    0x0020_0000 to 0x0020_3FFF shadow array, (OTP)
    0x0020_4000 to 0x003F_FFFF reserved memory,
    0x0040_0000 to 0x0040_3FFF code flash test sector, (OTP)
    0x0040_4000 to 0x007F_FFFF reserved memory,
    0x0080_0000 to 0x0080_FFFF data flash memory,
    and so on....

    Do you agree with the above table of the memory structure? So as you can see there are 2 sections of OTP, and addresses that are reserved where you cannot erase or program those locations. This is why your request does not make sense to me.

    Takao Yamada

  • Hello Takao,

    I'm sorry, you are right yes.
    I'm sorry for the misunderstanding.

    Just is it possible to have one algorithm for the C Flash and the D Flash Please ?
    We would like only one algorith for both memory range.

    Thanks a lot for your support

  • Hello Takao,

    Any update of the new algorithm please ?

    Thanks a lot

  • Greetings,

    Typically you have to give us 5 business days to complete an algorithm. But I will do my best to get it done earlier.

    Please go to support -> support request and create a ticket about this so that I can send the new algorithms to you the moment they are completed.

    Takao Yamada

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