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Reduced Jtag/BDM interface on Coldfire V2/V3/V4.
LG J. Jun 6, 2016 at 03:14 AM (03:14 hours)
Staff: Takao Y.

  • Hello,
    I would like to use USB-ML-UNIVERSAL on a new design with a Coldfire V2 microcontroller.

    My question is : Do I need to implement the 26-pin connector of BDM interface or can I just use a 10-pin connector with only the JTAG interface ?



  • In other words, is it possible to use a reduced connector with only the 10-pin of JTAG interface instead of 26-pin connector of the JTAG/BDM interface on MCF52223 ?

  • Greetings,

    I think this thread will answer your question:

    Takao Yamada

    • Thank you for your answer.

      It help me to understand how the JTAG/BDM inerface works.

      But I want to know if the USB-ML-UNIVERSAL will communicate well with the microcontroller if I implement only the 10 first pins of the 26-pins connector.


      • To add a few comments:

        We always recommend using the PST signals (PSTALL or PST0-3) where possible, even though we give the capability not to use them in certain products. The signals you need are :

        BKPT, DSCLK, DSI, DSO, Reset, PSTALL or PST3:0, TVCC, GND, and TA/TEA if available.

        If you are using an MCF5206E or MCF5272, you need the PSTCLK signal as well (usually this is not the case).

        If you target has a PSTALL signal, you can connect this to all four PST3-0 lines on the Multilink.

        • Thank you for your answer.
          I use MCF52223 so I don't need the PSTCLK signal.

  • Greetings,

    If you read the multilink universal reference manual, you can read chapter 5 called startup reset sequence. Here you can see what signals are used to enter background via JTAG.

    Concerning PST lines:

    My only worry TEA line, which is used to monitor external bus activity and recover from bus errors. Some chips have it, some do not.

    Takao Yamada

    • Thank you for your answer.
      I understand that the PST pins are optionnal, isn't it ?

  • I will try to conclude.
    PST lines are recommended but can be disabled in the connection assistant.
    So can i implement my connector like the following one ?
    | |
    NC|1 2|BKPT
    GND|3 4|DSCLK
    GND|5 6|TCLK
    RSTI|7 8|DSI
    +3.3|9 10|DSI
    NC|11 12|NC
    NC|13 14|NC
    NC|15 16|NC
    NC|17 18|NC
    NC|19 20|NC
    NC|21 22|NC
    NC|23 24|NC
    NC|25 26|NC

  • Greetings,

    Again, my only worry is TE/TEA line on pin 26 if it exists on your chip. If your chip hits a bus error or is stuck in a state, then you will have troubles being able to recover. If that is fine with you, then go right ahead and implement what you have proposed.

    Takao Yamada

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