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by Juan See


The Boot Mode Index (BMI) is a 2-Byte value stored in Flash that holds information about the start-up mode and debug configuration of an Infineon XMC1000  device. From the factory, XMC1000 series devices are configured with ASC_BSL (ASC Bootstrap Load) mode by default. In ASC_BSL mode, ARM Serial Wire Debug (SWD) capabilities are disabled. During debug entry, PEmicro tools will automatically change the Boot Mode Index (BMI) to "User mode with debug enabled (UMD) SWD", allowing the user to communicate with the Infineon XMC 1000 series through SWD. 

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by Zahar Raskin


The "S32 Design Studio for Power IDE" from NXP provides a comprehensive enablement platform for Power Architecture with full integration of PEmicro’s GDB Server for Power Devices. This provides advanced debug capabilities via PEmicro’s Multilink, Cyclone, and embedded OpenSDA debug interfaces.

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by Steve McGrath


DAVE™ is an Eclipse-based IDE by Infineon which supports development and debugging of code on XMC1000 and XMC4000 devices. PEmicro's Multilink debug probes and Cyclone programmers can provide sophisticated debug for these Infineon devices via the DAVE™ IDE.  To use PEmicro's debug probes the user can simply install PEmicro's GDB Server Plug-In for ARM devices and then create a launch configuration.

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by Gilbert Yap


PEmicro supports a wide selection of STMicroelectronics' STM32 device families. Many STM32 devices include a set of user configurable option bytes that can control features such as HW/SW watchdog, read protection, and write protection. These options give users a convenient way of changing the settings of their device. Configuring option bytes of a STM32Fx or STM32Lx device is made easy with our PROG software and Cyclone Image Creation Utility software

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by Mika Ichiki-Welches


PEmicro considers the privacy of its customers' intellectual property to be of utmost importance. Silicon Labs' 32-bit devices feature an Authentication Access Port (AAP) as part of their security features, and for some of these devices, a debugger may have a limited time to access this port when communicating with an unsecured device. With that in mind, recent PROG software (v6.94) and Cyclone firmware (v10.04) releases now provide support to secure, unsecure, and mass-erase Silicon Labs devices with these debug time-sensitivities, which can help users keep their valuable data safe.

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by Gilbert Yap


PEmicro has expanded its ARM® device support of Cypress’ current PSoC 4, PSoC 5, and PSoC 6 devices. 

PEmicro's popular Multilink debug probes and Cyclone ISP programmers now include support for the following Cypress device families: 4000, 4000S, 4100, 4100S, 4100PS, 4100S Plus, 4100M, 4100BLE, 4200, 4200M, 4200L, 4XX8_BLE, 5200, 5400, 5600, and 5800, as well as Cypress’ new PSoC 6xx6 and 6xx7 series microcontrollers. 

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by Gilbert Yap


The safety of users’ intellectual property is a top priority for PEmicro. Utilizing the “Chip Protect” function of processors prevents data from being read or written from an external source, which helps keep your data secure. PEmicro is constantly expanding its compatibility with different manufacturers’ device security methods. Each manufacturer may employ multiple methods for securing or unsecuring a processor, so the goal is to make this process as simple and easy as possible for the user.

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by Gilbert Yap


Cypress’ PSoC5 line of microcontrollers are a great option for high performance at a low cost. The PSoC 5 provides an Error Correcting Code (ECC) feature to help detect errors in operations that manipulate the flash memory. The ECC peripheral can be enabled or disabled by writing to the Nonvolatile Latch (NVL). The advantage of disabling ECC is that each row of flash gains 32 bytes for data storage, extending the row from 256 to 288 bytes.

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by Gilbert Yap


PEmicro is constantly expanding its support for device security methods. The Cypress’ PSoC 4 Cortex-M0 processor-based microcontrollers have a few device features to prevent external flash access. Enabling device security features on products prevents third party sources from accessing or manipulating program code and data. This post aims to detail the secure and unsecure process for Cypress PSoC 4 devices. 

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by Kevin Meyer and Steven McGrath


Dec. 2018 - We've updated this blog post with more info about Multilink and Cyclone implementation...

The JTAG specification introduced daisy chaining of MCUs in order to reduce the number of headers required to debug and program multiple MCUs. JTAG daisy chaining allows multiple MCU’s (and other JTAG compatible hardware, such as FPGAs) to share a single debug header. PEmicro currently supports daisy chaining of ARM-Cortex MCUs via our Cyclone programmers and Multilink debug probes. The same is true for most PEmicro software, including our Eclipse plugin GDB Server, and our Cyclone automation and control packages.

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by Julie Perreault and Keith McNeil


PEmicro is pleased to announce that the Multillink and Multilink FX debug probes have added real-time SWO data capture as well as power consumption monitoring in NXP's MCUXpresso IDE 10.3 release. SWO data capture includes high speed printf() output from running code, R/W accesses to memory and variables, interrupt execution, and more. The power consumption monitoring of the Multilink FX runs up to 250KSamples/S with a current detection range of 1mA to over 200mA. 

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by Steve McGrath


PEmicro has announced the addition of support and features for a new set of STMicroelectronics’ STM8 devices to PEmicro's diverse line of embedded systems tools.

STMicroelectronics’ STM8AL ultra-low-power series for automotive applications stresses green energy, application safety and power efficiency with the use of these microcontrollers. PEmicro’s powerful Cyclone Universal and Cyclone Universal FX stand-alone programmers now support these and many other families of STMicroelectronics’ devices.

Current users of compatible PEmicro products can update their product firmware to add support for these devices. The corresponding programming algorithms can be downloaded from PEmicro's online support center.



by Peter Truong


PEmicro has been offering debug probes for over 20 years. Our latest models, the Multilink and the Multilink FX, have become two of our most popular products, with tens of thousands of units sold worldwide. With so many Multilinks in use, PEmicro felt that it made sense to create a program that enables customers to turn in old/broken units for a discount when purchasing new hardware, or when upgrading from a basic to a high-speed model. Therefore PEmicro is pleased to introduce the Multilink Trade-in Program.

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by Steve McGrath


Simplicity Studio 4 is an Eclipse-based IDE by Silicon Labs which supports development and debugging of code on EFM32 devices. PEmicro provides hardware debug probes which provide sophisticated debug of these same EFM32 devices. This blog demonstrates the three steps needed to install and configure PEmicro Multilink and Cyclone debug support in Simplicity Studio.

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by Zahar Raskin


PEmicro's run control and FLASH programming support is fully integrated into IAR’s Embedded Workbench for ARM microcontrollers. This provides debug capabilities via PEmicro's Multilink, Cyclone and embedded OpenSDA debug interfaces, which support a broad range of ARM devices from NXP, STMicroelectronics, Atmel, Cypress, Infineon, Silicon Labs and many others. For complete list of ARM devices that PEMicro supports, please visit the following page: http://www.pemicro.com/arm/.

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by Nick DeLeon & Keith McNeil


PEmicro takes its responsibility as a corporate citizen seriously, both as it relates to our products and our footprint as a company. RoHS, CE, Conflict Minerals and other certifications and programs help us to make sure our products live up to our own and industry standards. We believe environmental compliance is an essential part of doing business and strive to meet regulations and certifications that make the world a safer and healthier place for all.

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by Zahar Raskin


PEmicro's run control and FLASH programming support is fully integrated into ARM's MDK-ARM Keil uVision Integrated Development Environment v5.25 for ARM microcontrollers. This provides debug capabilities via PEmicro's Multilink, Cyclone and embedded OpenSDA debug interfaces for a broad range of ARM devices from NXP, STMicroelectronics, Atmel, Cypress, Infineon, Silicon Labs and many others. For complete list of ARM devices that PEMicro supports, please visit the following page: http://www.pemicro.com/arm/.


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by Mikhail Andreev


PEMicro is pleased to announce the release of a new expansion plugin for PEmicro's Eclipse GDB Server. With this release, PEmicro has added extensive new device support for a wide variety of ARM device manufacturers. Support now includes devices from NXP, Atmel, Cypress, Infineon, Maxim, Nordic, Silicon Labs, STMicro, Texas Instruments, and Toshiba. For a complete listing of supported devices, see PEmicro's supported ARM devices page..

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by Edison Tam and Peter Truong


PEmicro offers three USB Multilink debug probes, each with different features or device support. In this video, Edison Tam offers a brief overview of our Multilinks to help users decide which Multilink would be best suited to their project. Read more...




PEmicro has announced the release of support for macOS in PEmicro’s Eclipse GDB Server. PEmicro offers a downloadable GDB server plug-in for Eclipse-based 3rd party IDE’s including NXP MCUXpresso, Kinetis Design Studio, and CodeWarrior. It also features full support for PEmicro's Multilink debug probes and Cyclone production programmers, plus NXP’s openSDA series of debuggers and programmers. Apple® users are now able to take advantage of PEmicro's versatile hardware solutions using NXP’s software tools and PEmicro’s GDB server in their preferred operating system.

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PEmicro announced the addition of support for Freescale's MPC5xx/8xx devices devices to its high-speed Multilink Universal FX development interface. This addition enhances the all-in-one capabilities of the Multilink Universal FX - PEmicro's flagship Multilink interface - and solidifies PEmicro's future support for Freescale's MPC5xx/8xx architecture.

Multilink Universal FX users may download the updated Technical Summary (v.1.03) from PEmicro's support center.





Freescale offers certain development boards with an integrated debug circuit based on Open Source BDM. The Open Source BDM circuit design is an open source, community-driven design. It has been published on Freescale's website, and full documentation can be found in the Community Forums.

P&E Microcomputer Systems has released a free utility that allows the user to upgrade the firmware on the current JM60-OSBDM development board design. The utility may be downloaded at: www.pemicro.com/osbdm

P&E's USB Multilink (part# USB-ML-12E) hardware interface is required to perform this firmware update.  The process of updating the firmware via this utility is very simple. Please follow these steps:

1. Plug the USB Multilink into the 6-pin BDM header for a JM60 device in the OSBDM design.

2. Click the "Select" button to browse for the firmware file that you would like to download to the OSBDM design.

3. Click the "Update Firmware" button to complete the firmware update.

 

New! Follow us on Twitter at twitter.com/pemicro!





In a previous post, we showed how to use PKGPPCNEXUS and  PKGCFZ_PRO to display the contents of an ELF/DWARF file using Readelf.  In this post, we look at the Readelf output and explain its description of your object code.

We will use this example Readelf output to illustrate the kinds of information that Readelf provides.

The first item of interest is labeled "Entry point address". This is the address of the first instruction executed after reset. Your compiler or linker determines this value. The PEmicro debugger optionally uses the entry point address to execute your target application.

The "Section Headers" portion lists all of your linker sections that made it to your ELF/DWARF file. The ".debug_info" section is where ICD looks for the debugging information entries. Note that not all of these sections contribute to the application memory map.

The portions titled "Program Headers" and "Section to Segment mapping" describe the application memory map. ICD and PROG use the program headers to determine where to place object code on your target. Check that a linker section is included in the final memory map by examining the section to segment mapping. Note that the first entry in the program headers corresponds to the first entry in the section to segment mapping.

From the program headers, you can gather the following information about the memory map:
Type - Only LOAD types contribute to the final memory image
VirtAddr - load time location of code
MemSiz - number of bytes that the code segment occupies in the final memory image

PEmicro's PROG and ICD software support an uncommon feature of the GNU compiler.  GCC uses both the program header VirtAddr and PhysAddr fields, the former for run time address and the latter for load time address.  For more information on this useful feature, please refer to this document.





The HC(S)12(X) microcontroller family uses a paged flash architecture to expand its addressable memory beyond the standard 64KB (or $0000 to $FFFF). Microcontrollers with this feature treat a 16KB block of memory from $8000 to $BFFF as a memory window.  This window allows multiple 16KB blocks to be switched into and out of program memory.  An 8-bit program page register (PPAGE) tells the microcontroller which block to read.

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If you use the ELF/DWARF file format with PEmicro's Programming or Debugging software, download one of our free C development kits to view the information within the ELF/DWARF file.  Use Readelf to examine your application memory map, check your linker script, determine application size, view detailed debugging information, and more.

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