How To Use Longer Cables To Extend The Reach Of PEmicro Products

Certain test procedures and production environments require the use of a cable longer than the typical 9-inch flat ribbon cable typically included with PEMicro hardware interfaces. Extending the cable length requires special considerations for signal integrity, crosstalk, and electromagnetic interference. Simply using a longer cable without understanding these topics will usually produce a setup that does not work reliably, if at all. Extending the ribbon cable should be the option only if you determine that you cannot make longer the length of the USB, Ethernet, or Serial cable that connects the PEMicro hardware interface to your PC. The cables for the communication ports already have some shielding.

If it is necessary to use a longer ribbon cable, PEMicro recommends using a shielded jacketed cable . This cable configuration is excellent at reducing crosstalk as well as minimizing electromagnetic interference from other devices. Further improvement can be obtained if the wires are also arranged in twisted pairs.

Shielded USB cables are inexpensive and easy to rework. The four wires provided can be used to create a cable for the standard 6-pin BDM header used by many NXP microcontrollers (such as the HCS08, RS08, CFV1, HCS12, and S12Z). Additional shielded USB cables can be used for other devices that require more debug pins.

Thicker wires offer less resistance to current which will reduce the voltage drop of the signal across the length of the wire. Our current 6 pin and other ribbon cables are AWG 28. Using a thicker wire (smaller AWG number) you may get some improvements in signal integrity.

In general, these guidelines should be followed for all cables between the target microcontroller and the PEMicro hardware interface:

1. Use the shortest cable possible

    

2. Use shielded cable configurations to reduce electrical parasitic effects

    

3. Lower the communication frequency. For the ColdFire or Qorivva architectures, the communication frequency is controlled by the BDM Debug Shift Frequency setting. For other architectures, the communication speed is only dependent on the processor's bus frequency. Reducing the bus frequency (ie. disabling the PLL) should improve results.