PEmicro Blog

Programming Paged Flash for HC(S)12(X) Microcontrollers

Oct 09, 2008

The HC(S)12(X) microcontroller family uses a paged flash architecture to expand its addressable memory beyond the standard 64KB (or $0000 to $FFFF). Microcontrollers with this feature treat a 16KB block of memory from $8000 to $BFFF as a memory window.  This window allows multiple 16KB blocks to be switched into and out of program memory.  An 8-bit program page register (PPAGE) tells the microcontroller which block to read.

The entire paged memory can be addressed in two different ways: logical or physical.  Logical addresses are treated as segments of 16KB separated by 48KB.  These segments (or pages) of memory occupy $8000 to $BFFF.  In addition to the page window, there are two fixed 16KB blocks from $4000 to $7FFF and $C000 to $FFFF.  These fixed locations are addressable in either range.  For example, the last page of the MC9S12DP512 is $3F8000 to $3FBFFF or $C000 to $FFFF.  Physical addresses treat the whole flash as one linear space in a 24-bit memory map.  For example, the physical address space of the MC9S12DP512 is $080000 to $0FFFFF.

To program the flash with PEmicro's software, you need an S-record file that has physical addresses by definition.  If you have a logical file, you can use the Log2Phy tool to convert it to an S-record.  Select the microcontroller from the drop down box in Log2Phy.  Then load the s-record and type in the name of the output file.  Press the Convert button and the results of the conversion will appear in the box. The S-record file is saved to a file with the extension “.phy”.  If there are unconverted logical addresses, they are saved to a file with the extension “.s19.extra”.
   
The Log2Phy tool now supports all S12, S12X, S12XE, and S12P devices.

This is a screen capture of the Log2Phy tool showing the conversion of a logical file for the MC9S12DP512 to an S-record:


This is the assembly source with sample code:

; Device = MC9S12DP512

      org $8000               ;page 20 is the first page
      dw  $8000               ;physical address $80000
      org $BFFE
      dw  $BFFE               ;physical address $83FFE                 

      org $228000             ;page 22
      dw  $228000             ;physical address $88000
      org $22BFFE
      dw  $22BFFE             ;physical address $8BFFE

      org $C000               ;3F is the last page
      dw  $C000               ;physical address $FC000
      org $FFFE
      dw  $FFFE               ;physical address $FFFFE
      
      org $0800               ;not in flash address space
      dw  $0800


           
This is the output of the Log2Phy tool which shows the results of the conversion:


12 Bytes Converted and 2 Bytes Un-Converted.
Original Logical Memory Usage Map
 BEGINING  ENDING   LENGTH
 00000800-00000801 00000002
 00008000-00008001 00000002
 0000BFFE-0000C001 00000004
 0000FFFE-0000FFFF 00000002
 00228000-00228001 00000002
 0022BFFE-0022BFFF 00000002
Un-Converted Logical Memory Usage Map
 BEGINING  ENDING   LENGTH
 00000800-00000801 00000002
Converted Physical Memory Usage Map
 BEGINING  ENDING   LENGTH
 00080000-00080001 00000002
 00083FFE-00083FFF 00000002
 00088000-00088001 00000002
 0008BFFE-0008BFFF 00000002
 000FC000-000FC001 00000002
 000FFFFE-000FFFFF 00000002
Converting Addresses from Logical to Physical


Page 20 and $8000 

Convert to binary: 

20 = 0010 0000  

8000 = 1000 0000 0000 0000 => drop 2 most significant bits (15 and 14) => 00 0000 0000 0000

Concatenate two binary values => 00100000 00000000000000

physical address = 00 1000 0000 0000 0000 0000 => $080000 


 

Page 3F and $C000 

Convert to binary: 

3F = 0011 1111  

C000 = 1100 0000 0000 0000 => drop 2 most significant bits (15 and 14) => 00 0000 0000 0000

Concatenate two binary values => 00111111 00000000000000

physical address = 00 1111 1100 0000 0000 0000 => $0FC000 


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