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Meminit.l command for S32R274
. Sep 13, 2017 at 05:05 AM (05:05 hours)
Staff: Takao Y.

  • Hi 

    I am want to realize a multi core system on a S32R274 processor and work with the S32 Studio of NXP.

    I placed a shared memory area in the SRAM, at the address 0x400A0000. What is interesting is, that after flashing or when debugging writing there works.
    But after re-powering an exception occurs, when writing in the shared memory.

    The difference between this 2 cases is the file "s32e200_s32r274.mac", which is executed by the S32 Studio every time after flashing or debugging.

    And after some tests i found out, that the following code makes the difference

    "meminit.l 0x40000000 0x4017FFFF"

    To make my code work I would like to know, what exactly the meminit.l command does with this memory area.

    Some code in C or Assembler would be very helpful.


    Thanks and best regards
    Roger




    Comments

  • Greetings,

    Like all PowerPC Nexus devices, there is ECC requirements when writing and reading from memory. (read the reference manual if you do not know ECC). When you power-cycle the board, the RAM region is now random data that no longer matches with the ECC calculation. So you must reset the ECC values to be able to reuse it again.

    What meminit does is write the RAM regions with whatever is held in the 32 general purpose registers. So we loop through address 0x4000_0000 to 0x4017_FFFF and move register values into RAM.

    If you create a brand new project for your device within S32 Power IDE, then you should see this initialization done in the startup.S file.(project_settings -> startup_code -> startup.S -> initialise SRAM ECC and initialise local data SRAM ECC)


    Takao Yamada

    • Hi Takao Yamada,

      Thanks for your explanation. You are absolutely right. Due to our multi-core system, I made a change in the linker script file, which caused the "initialise SRAM ECC" code in the startup.s file to only initialize the memory I associated for the first core.
      I changed it back, so the hole SRAM gets initialized. Accessing the shared memory is now working as expected.

      Best regards,
      Roger

  • Greetings,

    Wonderful! I am glad I was able to help.


    Takao Yamada

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