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Dual core breakpoints are not hit (MPC5643)
Jan K. Dec 16, 2016 at 08:54 AM (08:54 hours)
Staff: Takao Y.

  • Hello,
    I'm trying to debug some software on a MPC5643 target in dual core mode (DPM) with the ICDPPCNEXUS tool and a Multilink Universal FX Rev. B. After setting a breakpoint I issue a "GOALL" command. However, the breakpoint is not hit and the target seems to run.
    Now, when I manually stop execution, I see that Core 0 has hit the breakpoint (!) and Core 1 has also stopped.

    I wonder why I don't get the "breakpoint hit" signal after issuing the "GOALL" command. Do you have an idea why that happens? I'm trying to use UNITPPCNEXUS for this use case as well, so any help is appreciated.

    Kind regards,
    Jan




    Comments

  • Greetings,

    In our software, if a core hits a breakpoint but if the other core is still running then the software will not halt. When all the cores are halted, then you will be able to see your code and memory windows refresh.

    But you should see the core that hit the breakpoint halted at that location. The other cores should continue to run even if a separate core hits a breakpoint.

    There are no separate threads of debug sessions going on. It is all a single thread so the visual interface is either all halted, or all running. We will look into improving our software to allow separate core debugging. Is this preventing your from completing your project?


    Takao Yamada

  • I primarily use the ICDPPCNEXUS GUI to develop code based on the UNITPPCNEXUS DLL. So the behavior of the GUI is not critical. My use case is to set a breakpoint in DPM mode, stop if some core hits it, and then have the other core also stopped.
    I start by setting the breakpoint on both cores (switching between them with select_once_core()). Then I run "resume_all_cores". Then I repeatedly switch between both cores and call "test_for_freeze" to see if one has stopped. Then I manually stop the other one with "go_to_background".
    This doesn't seem to work at the moment. I can't debug this code right now, though. Maybe there still is a bug in my code. Can you confirm that the logic above is correct?
    I also don't set breakpoints with "set_inst_brkpt" but manually set ONCE registers. This works fine for LSM mode. But maybe it doesn't work in DPM mode?

    Kind regards,
    Jan

  • Greetings,

    Deeply sorry for the long delay in response.

    You are correct, using test_for_freeze to see if the core has halted at a breakpoint and using go_to_background to manually stop a core.

    My understanding is that if any core reaches the addresses set in the ONCE registers (iac1, iac2, etc) and you enable them in dbcr0 register, then it would halt that core.

    When you say it is not working in DPM, is it not working on the primary and secondary cores? Or just not working in the secondary core? It would be odd if the primary core exhibited different behavior between LSM and DPM.


    Takao Yamada

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