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Cyclone can program stand-alone, but can not from IAR Workbench.
s. Mar 1, 2016 at 04:36 PM (16:36 hours)
Staff: Zahar R.

  • Hi, I have a Cyclone that can program our target (KL17 32K QFN32) processor in stand-alone mode every time.  But when I try to program the same project into the same processor from my PC using IAR Workbench it never works!  

    In both cases the target is providing power. I have scope'ed the Reset, Clock and Data lines from the Cyclone to the processor. Both ways I see transitions from ground to about 3 volts. So no stuck lines. But when in stand-alone mode there is about 2 seconds of transitions on the clock and data lines while the reset is low. In contrast, when attempting the same using IAR Workbench, there is only a brief period of time the reset from the Cyclone goes low and there are only a couple of cycles of the clock and data lines. If I had to guess, I'd say two 8 bit bytes are exchanged. Then the reset line from the Cyclone goes high and the IAR Workbench application says "it can not talk to the processor"! What's going on?




    Comments

  • Some more information to help solve the above stated problem:

    This is the PEMicro script to program the KL17 32K QFN32 Freescale processor:

    CM C\Program Files (x86)IAR Systemps\Embedded Workbench 7.3\arm\bin\pemicro\P&E\supportFil...
    SS C:\Users\xxxxxxx\work\svn\xxxx_xx\trunk\iar\debug\xxxx_xx.out
    EN ;Erase if not Blank
    PM ;Program Module
    VC ;Verify Checksum

    This appears to be what IAR Workbench is using:

    <flash_device>
    <exe>$TOOLKIT_DIR$\config\flashloader\Freescale\FlashKLxx8KROM.out</exe>
    <page>4</page>
    <block>32 0x400</block>
    <flash_base>0x00000000</flash_base>
    <macro>$TOOLKIT_DIR$\config\flashloader\Freescale\FlashKLxx.mac</macro>
    <online>1</online>
    <aggregate>1</aggregate>
    <args_doc>--enable_config_write - allow programming of 0x40C - 0x40F with user supplied
    data, in other case flashloader after erase of block 1 will write 0xFFFF_3DFE
    (unsecure state).</args_doc>
    </flash_device>

    I hope that helps. As the former method always works and the latter always fails. Both using the same PEMicro Cyclone pod.

    -thanks

  • I now have both Freescale and IAR looking into this problem.  I am looking for problem pins on the Freescale KL17 32K QFN32.  I am looking that the NMI pin.  Freescale says that the NMI pin is re-enabled when the KL17 is subjected to a "MASS ERASE".  

    So, I am asking you:

    "What type of erase is being executed on the line 'EN ;Erase if not Blank' in your PEMicro Cyclone script above?".

    -thanks

  • You "PEMICRO Connection Manager" is launched by IAR's Workbench.  In that application there is a check-box labeled: "Use SWD reduced pin protocol for communications".

    1. What does that check-box above do?

    2. Is the "SWD" setting saved in a file? Is it possible that another independent run PEMicro application like the "Cyclone for ARM defice - Image Creation Utility" use that saved-setting?

    -thanks

  • Hello, 

    Just want to quickly follow up to see if this issue was resolved.

    What version of IAR are you using? Which PEmicro Cyclone are you using? What is the revision?

    Under IAR, the FLASH programming is handled by IAR, however, there should not be an issue with running a debug session via a Cyclone.

    Use SWD checkbox, forces the SWD single wire protocol to be used, instead of JTAG, which is the correct protocol to use for NXP's KLxx device family.

    Best Regards,
    Zahar
    P&E

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