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Error in ONCE status register at Initializing
Mats W. Aug 31, 2015 at 05:55 AM (05:55 hours)
Staff: Takao Y.

  • Have 30 pcs of new PCB's including one MPC5517 processor at each.
    Have problem with "Error in ONCE status register" at Initializing.
    20 pcs of the total 30 start first, second or third time.
    10 pcs of the total 30 will not be able to connect at Initializing.
    No contact at all with processor.
    Use P&E Micro Multilink Universal FX and PROGPPCNEXUS version 5.48.0000.
    Need help to solve this problem.




    Comments

  • Greetings,

    Try lowering the debug shift frequency. Error in Once indicates a communication problem between the P&E interface and the chip.

    A few questions:
    1) Has this setup worked in the past?
    2) Do you use any custom ribbon cables, adapters, reset drivers, external watchdog, or other unique hardware between the P&E interface and the chip?
    3) Are you getting the error before loading the algorithm or before? If after the algorithm, which algorithm are you loading?


    Takao Yamada

  • Thanks for feedback.
    1. Similar problem for all produced PCB's. (production start spring 2015)
    2. A reset circuit is used. No other components between interface and chip. Ribbon cable included in Multilink Universal FX is used.
    3.We getting error before loading algorithm.
    (use algorithm Freescale MPC5517 1x32x384k)

  • Greetings,

    1) So this has worked in the past? It just started to show problems now? What has changed?

    2) Since you have a reset circuitry, try adding a reset delay to your setup. This can be found as an option in the connection manager in PROG. I advise 200ms. Also try the slowest shift frequency to see if you can manage to talk to your chip at all.

    3) You are using the correct algorithm, but since the problem is before the loading then you have a general communication problem.

    4) If you are still having problems, then start scoping the signals on your 14-pin JTAG header. At first, the most important is the RESET and TVCC (VDD) lines. Make sure TVCC is a solid 5V or 3V, and RESET is not toggling all the time (which would indicate a watchdog). These are hardware problems.

    Then the TDI, TDO, RESET, TVCC (VDD), and TCK should all have fast rise-times and clean edges. If there are noises or no toggling at all, then let me know which signals are having issues.


    Takao Yamada

  • 1. This haven't work in the past. New project with problems from the beginning.

    2. Test different combinations. Will not solve this problem.

    3. Yes

    4. TVCC stable 5V. Reset stable.
    TDO signal is a mix of high freq and low freq.
    Sometimes drops from 5V slowly down to 2.5V.
    I can send a picture. (hard to describe with words)
    How to send the picture?

  • Greetings,

    You do not need to send me any pictures. But you only mentioned TDO line. What about the others?

    Just the mention of slow drop from 5V to 2.5V is an indication that something is wrong on the TDO line that is causing this issue. Do you have a proper pull-up resistor on TDI, TDO, TMS, and TCK lines in your schematic? (TDK can be pulled up or down). These pull-ups will really help in making sure there are no slow rise-times or floating. Do you have anything else connected to the TDO line?

    Checkout the recommended connections using Freescale's evaluation kit for the MPC551x:
    http://www.freescale.com/products/power-architecture-processors/mpc5xxx-5xxx-32-bit-mcus/mpc55xx-mcus:MPC5500/evaluation-kit-for-freescales-mpc5510-family:MPC5510KIT?fpsp=1&tab=Documentation_Tab

    Although TDO does not have a pull-up in this design, we still recommend adding one.


    Takao Yamada

  • Greetings,

    Any update on this?


    Takao Yamada

  • You must try by lowering the debug shift frequency. 
    Error in Once indicates a communication problem between the P&E interface and the chip.
    I also want to know has this setup worked in the past?
    Do you use any custom ribbon cables, adapters, reset drivers, external watchdog, or other unique hardware between the P&E interface and the chip?

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