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xxx512k_Linear_16k_page.12p vs xxx_pll.12p
LIn R. Mar 31, 2017 at 04:36 PM (16:36 hours)
Staff: Takao Y.

  • We have been using Freescale_9S12XDP512_1x16x256k_512k_Linear_16k_page.12P for HC9(S)12(X). If the microcontroller is configured to use Phase Locked Loop (PLL) for the system clocks, do I need to use Freescale_9S12XDP512_1x16x256k_512k_Linear_16k_page_pll.12P to create a .SAP file instead? 

    Thanks.




    Comments

  • Greetings,

    The PLL algorithms take advantage of the PLL to boost the speed of the internal clock for flash programming. It does not matter whether your application uses the PLL or not.

    When the P&E interface resets the chip before loading the algorithm all of the internal clock registers are using default reset values. Our algorithms then boost the internal clock speed using PLL. After flash programming, you would then disconnect the P&E interface and reset the chip, yet again resetting the registers to default values and the PLL register changes are wiped away. When the chip is powered up that is when your application would run. As you can see, your application and the algorithm are two separate entities.

    We suggest customers to use the PLL algorithms if you wish to flash program at a faster rate.


    Takao Yamada

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