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TRK-MPC5604P
Zouhrab Y. Feb 23, 2014 at 10:48 PM (22:48 hours)
Staff: Takao Y.

  • Hello,

    We are working on a new development project based on MPC5604P MCU. We are using TRK-MPC5604P Evaluation board developed by P&E Microcomputer Systems. I'm trying to run the example code provided in Freescale Application Note AN2865: (Section 22 ADC: Software Trigger, Continuous Scan) to experiment with the ADC functions. It is already the third day that I'm trying however, no matter what I did the ADC refuses to run. The conversion starts but never completes. I was wondering whether anybody had already used that example code given in the AN2865 and can help me finding what is wrong.



    Thank you in advance.


    Here are the values of ADC0MCR and the ADC0MSR registers.

    ===============================================

    ADC0MCR = 0x21000000

    Bit Field Values:

    OWREN bits[ 31:31 ] = 0 Discarded
    WLSIDE bits[ 30:30 ] = 0 Right-aligned
    MODE bits[ 29:29 ] = 1 Scan Mode
    EDGLEV bits[ 28:28 ] = 0 Ext. trigger on edge
    TRGEN bits[ 27:27 ] = 0 Disabled
    EDGE bits[ 26:26 ] = 0 Low level/Falling edge
    XSTRTEN bits[ 25:25 ] = 0 Disabled
    NSTART bits[ 24:24 ] = 1 Starts chain or scan conv
    Not Implemented bits[ 23:23 ] = 0
    JTRGEN bits[ 22:22 ] = 0 Disabled
    JEDGE bits[ 21:21 ] = 0 Falling edge
    JSTART bits[ 20:20 ] = 0 No effect
    Not Implemented bits[ 19:18 ] = 0
    CTUEN bits[ 17:17 ] = 0 Disabled
    Not Implemented bits[ 16:9 ] = 0
    ADCLKSEL bits[ 8:8 ] = 0 clkfreq=ipgclk freq/2
    ABORTCHAIN bits[ 7:7 ] = 0 Does not abort
    ABORT bits[ 6:6 ] = 0 Does not abort
    ACKO bits[ 5:5 ] = 0 Disabled
    Not Implemented bits[ 4:1 ] = 0
    PWDN bits[ 0:0 ] = 0 Normal operation

    ===============================================

    ADC0MSR = 0x1000804

    Bit Field Values:

    Not Implemented bits[ 31:25 ] = 0
    NSTART bits[ 24:24 ] = 1 Conv. occurring
    JABORT bits[ 23:23 ] = 0 New injected conv. started
    Not Implemented bits[ 22:21 ] = 0
    JSTART bits[ 20:20 ] = 0 Inj. conv. not occurring
    Not Implemented bits[ 19:17 ] = 0
    CTUSTART bits[ 16:16 ] = 0 CTU conv. not occurring
    CHADDR bits[ 15:9 ] = 4
    Not Implemented bits[ 8:6 ] = 0
    ACKO bits[ 5:5 ] = 0 Disabled
    Not Implemented bits[ 4:3 ] = 0
    ADCSTATUS bits[ 2:0 ] = 4 Sample




    Comments

  • Greetings,

    Sorry that no one has answered your forum post so far. Have you been able to resolve this issue? If not, I will do my best to help you out. It may be wise to try the Freescale forums as well since it is a bigger community and many experts that probably have tried the same example code as you.


    Takao Yamada

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