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by Keith McNeil


PEmicro has added support for WIZnet's W7500x devices to the Cyclone in-system programmer, Multilink debug probes, and PROG for ARM Cortex devices programming software. WIZnet's W7500x devices offer a hardwired TCP/IP core and are ideal for internet-connected (IoT) applications.

Current users of the Cyclone and Multilink/PROG can access PEmicro flash programming algorithms, including those for WIZnet's W7500x devices, on PEmicro's flash algorithm support page.



by Keith McNeil


PEmicro is changing its licensing for PROG software. Effective Monday, April 27, 2020 the license that activates PROG will reside on a Multilink debug probe rather than in the software itself. The user who activates the software will choose a Multilink on which to permanently install the license. This allows that Multilink to work with PROG on any machine where a supported version of the software is installed.


Note that the PROG software itself is unchanged, it is only the licensing which has been updated.

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by Mika Ichiki-Welches


Article updated Sept. 2020 to reflect additional device support.

Some ARM devices have areas of flash memory dedicated to programming user configuration data. Writes to such areas can be sensitive or permanent for some devices, so it is important that the developer is able to write these options in an intuitive way in order to minimizes human error. PEmicro's PROGACMP v7.78 and Cyclone software installer v10.41 introduce a set of new "user options" commands:

  • Create/Modify User Options File (CU)
  • Specify User Options File (SU)
  • Program User Options (PU)

These commands allow the developer to individually program user options through the use of an IDE.

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by Gilbert Yap


Along with clock multiplier and dividers, clock trimming offers a way for users to control the frequency of internal clocks in their target processors. Unlike multipliers and dividers, digital clock trimming allows changes to the internal clock through specific registers. Trim resolution can be any number of bits and different manufacturers provide different levels of trimming. Clocks are typically  trimmed to a specific value from the factory and are within a specific tolerance.

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by Juan See


The Boot Mode Index (BMI) is a 2-Byte value stored in Flash that holds information about the start-up mode and debug configuration of an Infineon XMC1000  device. From the factory, XMC1000 series devices are configured with ASC_BSL (ASC Bootstrap Load) mode by default. In ASC_BSL mode, ARM Serial Wire Debug (SWD) capabilities are disabled. During debug entry, PEmicro tools will automatically change the Boot Mode Index (BMI) to "User mode with debug enabled (UMD) SWD", allowing the user to communicate with the Infineon XMC 1000 series through SWD. 

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by Gilbert Yap


As of January 2020, PEmicro now offers a new method of programming user configuration data through the new Program User Options command. Click here for more details about this command.

PEmicro supports a wide selection of STMicroelectronics' STM32 device families. Many STM32 devices include a set of user configurable option bytes that can control features such as HW/SW watchdog, read protection, and write protection. These options give users a convenient way of changing the settings of their device. Configuring option bytes of a STM32Fx or STM32Lx device is made easy with our PROG software and Cyclone Image Creation Utility software

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by Mika Ichiki-Welches


Some Microchip/Atmel's SAM-Series devices allow rows of non-volatile flash memory (NVM) to be configured as EEPROM, so that users can treat NVM pages as EEPROM with Atmel's software, and let Atmel's back-end take care of keeping peripheral data safe.

PEmicro's Cyclone in-system programmers and PROGACMP flash programming software each allow users to set up NVM main flash space as emulated EEPROM by programming the EEPROM FUSE bits in the device's User Row. Our latest Microchip/Atmel algorithms support single-byte writes to the User Row, to preserve adjacent User Row settings.

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by Mika Ichiki-Welches


PEmicro considers the privacy of its customers' intellectual property to be of utmost importance. Silicon Labs' 32-bit devices feature an Authentication Access Port (AAP) as part of their security features, and for some of these devices, a debugger may have a limited time to access this port when communicating with an unsecured device. With that in mind, recent PROG software (v6.94) and Cyclone firmware (v10.04) releases now provide support to secure, unsecure, and mass-erase Silicon Labs devices with these debug time-sensitivities, which can help users keep their valuable data safe.

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by Gilbert Yap


PEmicro has expanded its ARM® device support of Cypress’ current PSoC 4, PSoC 5, and PSoC 6 devices. 

PEmicro's popular Multilink debug probes and Cyclone ISP programmers now include support for the following Cypress device families: 4000, 4000S, 4100, 4100S, 4100PS, 4100S Plus, 4100M, 4100BLE, 4200, 4200M, 4200L, 4XX8_BLE, 5200, 5400, 5600, and 5800, as well as Cypress’ new PSoC 6xx6 and 6xx7 series microcontrollers. 

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by Gilbert Yap


The safety of users’ intellectual property is a top priority for PEmicro. Utilizing the “Chip Protect” function of processors prevents data from being read or written from an external source, which helps keep your data secure. PEmicro is constantly expanding its compatibility with different manufacturers’ device security methods. Each manufacturer may employ multiple methods for securing or unsecuring a processor, so the goal is to make this process as simple and easy as possible for the user.

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by Gilbert Yap


Cypress’ PSoC5 line of microcontrollers are a great option for high performance at a low cost. The PSoC 5 provides an Error Correcting Code (ECC) feature to help detect errors in operations that manipulate the flash memory. The ECC peripheral can be enabled or disabled by writing to the Nonvolatile Latch (NVL). The advantage of disabling ECC is that each row of flash gains 32 bytes for data storage, extending the row from 256 to 288 bytes.

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by Gilbert Yap


PEmicro is constantly expanding its support for device security methods. The Cypress’ PSoC 4 Cortex-M0 processor-based microcontrollers have a few device features to prevent external flash access. Enabling device security features on products prevents third party sources from accessing or manipulating program code and data. This post aims to detail the secure and unsecure process for Cypress PSoC 4 devices. 

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by Johnny Ng


In addition to supporting the flash that resides in many different microcontrollers, PEmicro supports flash connected to an MCU via the SPI, I2C, and Address/Data bus interfaces. Depending on how the flash device is connected to the MCU, the programming algorithm may need to be set up to properly configure the external address, data, and bus control pins of the MCU. If you are not sure if you selected the right algorithm for your flash memory, please also read this blog post on selecting a flash algorithm.

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PEmicro’s PROG programming software will sometimes prompt the user to enter a “Base Address”. In this article, we discuss what the base address is and why it exists.

On most 8-bit and 16-bit processors, the internal flash/eeprom is located at fixed address locations. If this is the case, the associated programming algorithm will NOT prompt the user for a base address, since the address is fixed and already known.

On 32-bit processors and any systems using external flash, the address of the flash may be configured to reside anywhere within the processor’s address space. The developer will decide on an appropriate memory map early in the design process.

For these situations where the flash can be relocated, the PROG software will always move the flash so that it begins at address 0.  However, the developer may not have an object file that matches this new memory mapping. To account for this, the “Base Address” (specified by the user) is subtracted from all addresses in the object file prior to programming.

Below is an example of how the developer’s memory map may differ from the one in PROG. Although the external flash is located at different addresses, it refers to the same physical memory. Here, the user would specify a base address of FFC00000.

The base address should always be the starting address of flash in the developer’s memory map, and not the “first” address where data exists (although in most cases they are the same!)



by Johnny Ng


When using PEmicro's PROG family of programming software, it's necessary to specify the correct programming algorithm to match your hardware setup. Because PEmicro provides thousands of different programming algorithms this can seem like a duanting task. In this article we discuss how to quickly determine the programming algorithm that correctly matches a specific hardware setup.

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