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by Kevin Meyer

The JTAG specification introduced daisy chaining of MCUs in order to reduce the number of headers required to debug and program multiple MCUs. JTAG daisy chaining allows multiple MCU’s (and other JTAG compatible hardware, such as FPGAs) to share a single debug header. PEmicro currently supports daisy chaining of ARM-Cortex MCUs via our Cyclone programmers and Multilink debug probes. The same is true for most PEmicro software, including our Eclipse plugin GDB Server, and our Cyclone automation and control packages. Read more...

by Mikhail Andreev

PEMicro is pleased to announce the release of a new expansion plugin for PEmicro's Eclipse GDB Server. With this release, PEmicro has added extensive new device support for a wide variety of ARM device manufacturers. Support now includes devices from NXP, Atmel, Cypress, Infineon, Maxim, Nordic, Silicon Labs, STMicro, Texas Instruments, and Toshiba. For a complete listing of supported devices, see PEmicro's supported ARM devices page.. Read more...

by Edison Tam and Peter Truong

PEmicro offers three USB Multilink debug probes, each with different features or device support. In this video, Edison Tam offers a brief overview of our Multilinks to help users decide which Multilink would be best suited to their project. Read more...

by Huajun Liu

PEmicro has just released a new version of the Cyclone Image Creation Utility that allows the user to retrieve the configuration for a Stand Alone Programming (SAP) image directly from a previously saved image. Once the image configuration settings have been retrieved from an image file, the user can then regenerate the image, or modify the settings and generate a new file, or even use those settings with other .s19 files to generate a SAP image with different source but the same configuration. Read more...

by Keith McNeil

PEmicro's CYCLONE and CYCLONE FX programmers represent our effort to bring next-gen technology to the popular Cyclone platform. Some of the many improvements we were able to incorporate include better usability (via the 4.3" color touchscreen display), enhanced security, larger storage, and faster communications. The first of these new programmers launched in November 2015, and we now offer two models at each of the CYCLONE and CYCLONE FX levels - one that supports ARM devices plus many other NXP devices, and a more economical option that supports ARM devices only. Read more...

by Johnny Ng

In addition to supporting the flash that resides in many different microcontrollers, PEmicro supports flash connected to an MCU via the SPI, I2C, and Address/Data bus interfaces. Depending on how the flash device is connected to the MCU, the programming algorithm may need to be set up to properly configure the external address, data, and bus control pins of the MCU. If you are not sure if you selected the right algorithm for your flash memory, please also read this blog post on selecting a flash algorithm. Read more...

by Gerardo Ravago

There comes a time when an embedded application becomes complex enough that it requires an operating system. This may be because of a need for rich driver libraries, or a sophisticated task scheduling engine. In either case, a developer needs an equally sophisticated debugger to provide invaluable context information of their application. To that end, PEmicro introduced OS-aware debugging in its GDB Server for ARM devices. Initial support is available now for FreeRTOS, with further OS modules to be developed. PEmicro's GDB Server for ARM devices is available for download at no cost and works with PEmicro Multilink, Cyclone, and OpenSDA hardware interfaces. Read more...

by Juan See

The ability to view variables and memory while a target ARM device is running has been added to PEmicro’s GDB Server Plug-in for ARM devices. This Eclipse plugin can be installed in any Eclipse-based IDE and supports the debug of ARM microcontrollers via PEmicro’s Multilink, Cyclone, and OpenSDA debug hardware. The “Real Time Expressions” view, which is part of the plugin, is similar to the normal expressions view, except that it works while the part is running.


by Mikhail Andreev

PEmicro’s GDB Server can be installed directly into an Eclipse based IDE from an update site on PEmicro’s website. This adds the ability to debug via PEmicro’s Multilink, Cyclone, and OpenSDA hardware interfaces via the standard GDB debugger. Features include flash programming, breakpoints, watchpoints, trim, memory preservation, real-time variables, semi-hosting, and more. PEmicro periodically updates the plugins on its website with new device support, new features, and bug fixes.


by Esteban Gonzalez

The Cyclone FX has the capability to automatically select and launch a programming image based upon a scanned barcode. This can generate an error if more than one image corresponds to the barcode or no images correspond to the barcode. The CYCLONE FX includes a way to quickly gain insight into the issue. A log file is created every time the barcode scanner operates and it details the scanned barcode as well as the analysis process used to select the appropriate programming image.


by Julie Perreault

Different targets require a different power schemes that depend on the design of the target board, target voltages, and even the device architecture. PEmicro has designed their CYCLONE and CYCLONE FX to optionally power a target before, during, and after programming. Power can be sourced at many voltage levels from the Cyclone itself or sourced by an external power supply and switched by the Cyclone.


by Kevin Perreault

The CYCLONE and CYCLONE FX programmers from PEmicro have large 4.3” touchscreens which allow the user to see the Cyclone’s current status, select programming images, configure settings, and more. However, sometimes the Cyclone may be either at a remote location or physically inaccessible. For example, Cyclone programmers are often mounted within enclosed test fixtures and sometimes even have the screens physically removed to save space. In any of these cases, the touchscreen can also be accessed remotely, via Ethernet and USB.


by Esteban Gonzalez

Automatic selection and launch of a specific flash programming image based on a scanned barcode can improve the speed and accuracy of production programming, especially when there is a varied product mix being programmed. Barcode scanning improves accuracy by making the process of selecting a programming image fast, automatic, and less vulnerable to user error. PEmicro's CYCLONE FX programmers have the ability to use a barcode scanner, connected via the Cyclone's host USB port, to initiate programming. When a barcode is scanned, the Cyclone selects a specific programming image based on the barcode and programs the target board accordingly.


PEmicro announced the ability to add usage restrictions to programming images created for the Cyclone FX stand alone programmer. These usage restrictions include the ability to limit programming to a specific date range and also to set a maximum number of programming operations which can occur. The effect of this is that the user can limit the duration and amount of programming allowed by an image. This can be useful for protecting the IP contained within a programming image as well as making sure that programming images in production are not too far out of date. These restrictions persist even when the images are deleted/restored on a Cyclone unit's internal memory or SD card. Images are encoded in such a way as to deter tampering.


This video provides a brief comparison of the features of two popular P&E hardware interfaces, the USB BDM Multilink and the Cyclone PRO. This overview is intended to help users determine which interface is best suited for their project. More information about each interface can be found on the USB-ML-12 and Cyclone PRO product pages.

This video gives a demonstration of how to load a programming image onto a CompactFlash card in the expansion port of P&E's Cyclone products. CompactFlash activation is a powerful feature that lets users expand the memory and versatility of their Cyclone:



PEmicro’s Cyclone PRO/MAX Stand Alone Programmers offer an impressive array of capabilities such as in-circuit flash programming, stand-alone programming, and as much as 7MB internal non-volatile memory for storing programming images. And now this memory space can be expanded via optional software which enables the Cyclones’ CompactFlash interface. The expanded storage feature simplifies management of Stand-Alone Programming images. This Expert’s Corner explains how to take advantage of the CompactFlash card feature to facilitate the Stand-Alone Programming process.


P&E engineer Edison Tam demonstrates how to program Freescale's QE128 with P&E's Cyclone PRO stand-alone automated programmer, and gives an overview of the development and production capabilities of the Cyclone PRO. To learn more, please visit the Cyclone PRO product page:



 Systems that use memory-mapped external flash require special considerations from a programming perspective. Because there are so many variables, questions about external flash are among the most common types of technical support inquiries that we receive. In this article, we provide an overview of how the PEmicro PROG software handles external flash and offer some tips to help debug a system.  The examples in this article relate to Freescale ColdFire devices, but the concepts can be applied to most microprocessor systems.

Hardware connections
The following is the minimum set of signals required to access a memory-mapped external flash:

A[X:0] – Address signals
D[Y:0] – Data signals
CS – Chip Select
WE or R/W – Write Enable
OE – Output Enable

How PROG works
PEmicro’s PROG software forces the processor into background (or "debug") mode, where it gains full access to the processor’s resources. The flash programming algorithm is then loaded into the processor’s RAM. The algorithm contains all of the routines necessary to erase and program the external flash.

PROG always moves the external flash so that it begins at address 0 for programming. If your own memory map is different, PROG will need to account for this with the correct base address

Accessing the external flash
The PROG software uses the processor to access the external flash. This means that from the processor’s perspective, it must be able to read and write to the external flash. Usually, this is all handled by the processor’s external bus interface. Most of the external flash algorithms provided by PEmicro assume that this configuration is already handled by the user.

For example, most processors automatically start up with CS0 as the global chip select. The processor uses this chip select for all external memory accesses until it is reconfigured by the user. Likewise, the processor checks certain signals during bootup to determine the width of the data bus on CS0.

Extra initialization
Depending on the processor and external flash used, there may be some extra initialization that is not automatically performed by the processor on bootup, but is necessary before flash programming can take place. Users may perform this extra initialization by adding commands to the beginning of the algorithm itself. The algorithms may be edited with a simple text editor such as Notepad. Refer to the PROG help file for more detailed information on these commands.

Some examples:

1) Processor’s internal SRAM needs to be enabled, because it is disabled at bootup
CONTROL=80000001/0C05/             ;set up rambar to place ram at $80000000

2) Processor has a software watchdog that needs to be disabled
WRITE_WORD=0000/40140000/          ;kill extra sw watchdog

3) External bus interface is not properly configured after bootup
WRITE_WORD=0000/40000080/       ;CSAR0 - CS0 at address 0
WRITE_LONG=00000101/40000084/       ;CSMR0 - Enable CS0
WRITE_WORD=3D80/4000008A/       ;CSCR0 16-bit data bus

- Make sure you are using the correct algorithm. Please refer to this previous blog post for more information about algorithm selection.
- Double check hardware connections between the processor and the external flash.
- Check if the processor is actually able to access the external flash. The PROG software has a command called “Show Module” which will attempt to read the contents of the flash. If the data is displayed as XX, then the processor was unable to read the external flash.
-  If the hardware connections are good but the processor’s external bus configuration needs tweaking, a debugger will allow you to check the processor’s settings on bootup to make sure they match up with the external flash.

P&E has updated its Cyclone PRO Image Creation Utility to provide a way for users to set a custom trim frequency for HCS08, RS08, and CFV1 devices that have an internal reference clock. To use this feature, the user must first select a programming algorithm, because not all devices have the same maximum and minimum internal reference clock frequencies.

Once the programming algorithm has been selected, the utility will determine the allowed frequency range from which the user can choose. The user also has the option of enabling or disabling this feature. When it is enabled, the user can input a desired frequency. If the user does not enable this feature and input a frequency, or if this feature is disabled, the utility will simply select the default trim frequency as specified in the device reference manual.

Please note that this feature is only effective if the "PT ; Program Trim" command is included in the programming sequence. This custom trim feature in the updated Cyclone PRO Image Creation Utility is similar to the one available in CodeWarrior for Microcontrollers (RS08/HC(S)08/ColdFire V1).

To download the latest updates, please visit our Cyclone PRO product page.



PEmicro’s PROG programming software will sometimes prompt the user to enter a “Base Address”. In this article, we discuss what the base address is and why it exists.

On most 8-bit and 16-bit processors, the internal flash/eeprom is located at fixed address locations. If this is the case, the associated programming algorithm will NOT prompt the user for a base address, since the address is fixed and already known.

On 32-bit processors and any systems using external flash, the address of the flash may be configured to reside anywhere within the processor’s address space. The developer will decide on an appropriate memory map early in the design process.

For these situations where the flash can be relocated, the PROG software will always move the flash so that it begins at address 0.  However, the developer may not have an object file that matches this new memory mapping. To account for this, the “Base Address” (specified by the user) is subtracted from all addresses in the object file prior to programming.

Below is an example of how the developer’s memory map may differ from the one in PROG. Although the external flash is located at different addresses, it refers to the same physical memory. Here, the user would specify a base address of FFC00000.

The base address should always be the starting address of flash in the developer’s memory map, and not the “first” address where data exists (although in most cases they are the same!)

Today's tip concerns P&E's Cyclone automated programmers. With the release of the Cyclone Automated Control Package, users have been inquiring if there is a way to automate the creation of stand-alone images. Fortunately, with the standard Cyclone PRO/MAX installations, users already have command-line executables that can accomplish this task.

For each architecture there is a corresponding CSAPXXXX.EXE application that can be used to create a stand-alone image file. For example, to create an image for the Coldfire V2/V3/V4 devices, the user would use CSAPBDMCFZ.EXE. For this blog, we will demonstrate how to create a stand-alone image for a 9S08QE128 device by using CSAPHCS08Z.EXE.

Begin by creating a stand-alone configuration file. You can create a configuration file by configuring the programming sequence in the Cyclone Image Creation Utility and then saving it thorugh File ->Save Cyclone Configuration. You can also create a configuration file by using a text editor, typing in the commands, and saving it as a .CFG file. A typical configuration file might use the following sequence:

CM  C:pemicrocyclone_proAlgorithmsHCS089S08QE128.S8P
SS   C: esthcs089S08QE128.S19
EM  ;Erase Module
BM  ;Blank Check Module
PT  ;Program Trim
PM  ;Program Module
VM  ;Verify Module
VC  ;Verify Checksum

In this example, we will save the .CFG file as "9S08QE128.CFG" in c:. With the configuration file created, we can now create a stand-alone image or .SAP file by using the command prompt. In the command prompt, we can invoke the configuration script file as follows:

c:pemicrocyclone_procsaphcs08z.exe "c:9S08QE128.cfg" imagefile "" imagecontent "9S08QE128_1_26_2009"

The first parameter, "c:9S08QE128.cfg", specifies the location of the input configuration file.

The second parameter, imagefile  "", specifies the name and output location of the .SAP file.

The last parameter, imagecontent "9S08QE128_1_26_2009", specifies the image description.

You can use the '?' character option to cause the utility to wait and display the result of the configuration in the CSAP window. You can also use the '!' character option to cause the utility to wat and display the result only if the file failed to generate.

After invoking the configuration script in the command prompt, the file is generated in the C: directory. The file can now be loaded into the Cyclone PRO/MAX by using the Cyclone Automated Control Package or the Cyclone Manage Images Utility.










P&E's Cyclone PRO makes it very simple to program both the Flash and EEPROM on your HC(S)12(X) device.  There is a unique algorithm for each device and the type of memory, so the first step is to determine the correct algorithm for your setup.  A list of all of our algorithms is located here.  If you need help indentifying the correct algorithm, please refer to our previous post, Choosing The Right Programming Algorithm.

The following is a demonstration of how to program the 9S12DP256B microcontroller with P&E's Cyclone PRO,  first in Interactive and then in Stand-Alone mode. 

The 9S12DP256B has 4KB of EEPROM and 256KB (4 blocks of 64KB) Flash, so the algorithm files that you are need are:

Freescale_9S12DP256B_1x16x2k_4k_EEPROM.12P - Internal EEPROM algortihm

Freescale_9S12DP256B_1x16x128k_256k_Linear_16k_page.12P - Internal Flash algorithm

You can place your code for EEPROM and Flash in seperate S-Record files or combine it into one.  The P&E programming software will ignore any addresses in the S-Record that are out of memory range.  Note that Freescale's Codewarrior Develoopment Kit automatically outputs an S-Record file and PHY file that contain both the Flash and EEPROM code.  You can load the PHY file directly with either algorithm for programming.


When using the Cyclone PRO in Interactive Mode, open up the CyclonePro_PROG12Z Flash programming software and connect to the target board. 

1. Load Freescale_9S12DP256B_1x16x2k_4k_EEPROM.12P with the "CM" command.
2. Specify S-record that you want to program with the "SS" command. 
3. Erase the EEPROM with the "EM" command.
4. Program the EEPROM with the "PM" command
5. Verify the EEPROM with the "VM" command       
6. Load Freescale_9S12DP256B_1x16x128k_256k_Linear_16k_page.12P with the "CM" command
7. Erase the Flash with the "EM" command.
8. Program the Flash with the "PM" command
9. Verify the Flash with the "VM" command       



If you're using the Cyclone in Stand-Alone mode you'll need to configure the following programming sequence in the Cyclone PRO Image Creation Utility.  If you don't have this utility, you can download the software here

CM Freescale_9S12DP256B_1x16x2k_4k_EEPROM.12P
CM Freescale_9S12DP256B_1x16x128k_256k_Linear_16k_page.12P

When you need to convert between object file formats, download one of P&E's free, C language development kits.  These kits include a full GNU compiler toolchain, including Binutils OBJCOPY.

Download PKGPPCNEXUS Starter Edition

Download PKGCFZ_PRO Starter Edition

P&E's ICD In-circuit Debugger and PROG Flash Programmer software, included with the Starter Editions, natively supports several object file formats, including s-record and ELF.  Soon, P&E software will natively support Intel Hexadecimal files.

After installing one of the Starter Editions, run OBJCOPY from the Windows command-line.  The program is located in the gnuin subdirectory within the installation directory.  View the help screen for OBJCOPY from the command-line by typing  "powerpc-eabispe-objcopy" or "m68k-elf-objcopy".  You will see a list of all program options.  To determine which formats are available with OBJCOPY, take note of the final lines of the help screen.  You will use these format names, BFD names, when running OBJCOPY.

To convert a file, use the  "-O" option followed by the name of the desired output format.  The input format may be specified with the "-I" option, though this is often unnecessary.   For example, to convert the object data in a COFF file "file1.coff" to an s-record file "file1.srec":

m68k-elf-objcopy -I coff-m68k -O srec file1.coff file1.srec


powerpc-eabispe-objcopy -I aixcoff-rs6000 -O srec file1.coff file1.srec

If you are looking for greater control of file conversion, look at the options on the OBJCOPY help screen.  For example, with powerpc-eabispe-objcopy you may specify s-record length, force S3 records, and manipulate the linker sections in object files.

When using PEmicro's PROG family of programming software, it's necessary to specify the correct programming algorithm to match your hardware setup. Because PEmicro provides thousands of different programming algorithms this can seem like a duanting task. In this article we discuss how to quickly determine the programming algorithm that correctly matches a specific hardware setup.

1) Obtain the latest Programming Algorithms
PEmicro's Programming Algorithms are being constantly updated to support new devices. For convenience, all of our algorithms are located here. These algorithms are grouped according to the processor family being used.

2) Internal or External Flash/EEPROM?
Internal Flash/EEPROM is memory that resides inside the processor itself. Although most modern processors contain at least some internal Flash/EEPROM, there are some specific devices (Freescale MCF5474) that do not contain any nonvolatile storage. External Flash is a separate integrated circuit component that is externally connected to the processor. In general, external Flash is used for higher end 32-bit applications that require increased memory capacity.

3a) Internal Flash/EEPROM Algorithm Selection
Once you have identified the processor that you are working with, it is generally straightforward to identify the correct programming algorithm. All of PEmicro's internal Flash/EEPROM algorithms contain the processor part number in the filename. In certain cases, there are separate algorithms for programming the Flash and the EEPROM. This information is also present in the algorithm filename itself. All the algorithms for the processors in the same architecture end in the same file extension.


9S08GB60.S8P - Freescale MC9S08GB60 internal Flash

9S08SG4_PRESERVE.S8P - Freescale MC9S08SG4 internal Flash, preserve the factory trim values at 0xFFAE-0xFFAF

Freescale_912D60A_All_Flash_and_EEPROM.12P - MC912D60A internal Flash and EEPROM

Freescale_MC9S12DP256_1x16x128k_256k_Linear_16k_page.12P - MC9S12DP256 internal Flash
Freescale_MC9S12DP256_1x16x2k_4k_EEPROM.12P - MC9S12DP256 internal EEPROM

Freescale_MC9S12A256_1x16x128k_256k_Linear_16k_page_PLL.12P - MC9S12DP256 internal Flash, enable PLL to increase bus frequency on the MCU for faster programming speeds

Freescale_MPC5604B_1x32x128k.PCP - MPC5604B internal Flash 

Freescale_MC56F84543_1x16x32k_pflash.dsp - DSC 56F84543 internal p-flash 


HD64F2110B.H8P - Renesas HD64F2110B Internal Flash 

3b) External Flash Algorithm Selection


PEmicro's external Flash Algorithms use the following naming convention:
Manufacturer_PartNumber_NumDevices x DataBusWidth x NumRows.FileExtension

Manufacturer = Manufacturer of the external Flash device
PartNumber = Manufacturer Part Number
NumDevices = Number of these external Flash devices used in parallel. Devices are typically used in parallel to support a wider data bus. As an example, imagine that an external Flash device only supports a 16-bit data bus. By using two of these devices in parallel, a 32-bit data bus can be supported.
DataBusWidth = The data bus width of EACH external Flash device. Certain devices support multiple data bus widths.
NumRows = The number of rows in each Flash device. Each row contains DataBusWidth bits. NumRows multiplied by DataBusWidth results in the total size of the Flash memory.
FileExtension = The file extension is unique for each processor family.


ST_29W128FH_1x8x16meg.CFP - A single STMicroelectronics 29W128FH device, configured for 8-bit data bus. Total size = 8 bits (1 byte) x 16Meg = 16 MB
ST_29W128FH_1x16x8meg.CFP - A single STMicroelectronics 29W128FH device, configured for 16-bit data bus. Total size = 16 bits (2 bytes) x 8Meg = 16 MB
ST_29W128FH_2x8x16meg.CFP - Two STMicroelectronics 29W128FH devices, each configured for 8-bit data bus. The result is a 16-bit wide data bus. Total size = 2 x 8 bits (1 byte) x 16Meg = 32 MB

4) Device not supported?

This page can be used to request a specific Flash Programming algorithm if you do not find what you are looking for. Use this form if your device is not supported or if the existing algorithms do not match your setup correctly (e.g., if you are not using the default chip select). This service is provided by PEmicro free of charge.

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