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PEmicro is now providing serial SPI memory device programming algorithms for devices attached to ARM® Cortex-M microcontrollers. There are many reasons to use PEmicro’s algorithms for your programming requirements. Some of the more significant reasons are:

  • These algorithms work on all current manufacturers’ Cortex-M0…M4 microcontrollers.
  • Program both your microcontroller memory and attached SPI memories in one simple step.
  • Any four I/O port pins can be used to talk to the SPI devices: CLK, CS, MOSI, and MISO.
  • Any combination of microcontroller port pins can be used to connect to SPI memory devices.
  • Very fast bit banging software is used to implement these efficient and universal algorithms.
  • Data transfer rate to the SPI is increased by faster microcontroller operating frequencies.
  • Rates of over 600 kilobytes per second have been observed on a 120 MHz microcontroller.
  • All PEmicro SPI service algorithms automatically do a verify during the programming process.
  • No need to fight with complex SPI hardware during development and production processes.
  • Even if you use SPI hardware in your design, PEmicro’s algorithms can still be effectively used.
  • Configuration for your hardware setup is easy and readily updated during development.
  • Algorithms work seamlessly with PEmicro’s Cyclone mass production hardware and software.
  • Usable with PEmicro’s well-known GUI and Command Line programming software products.
  • Compatible with PEmicro’s SWD/JTAG development hardware interfaces such as Multilinks, etc.
  • Over 1100 SPI memory devices are currently supported and the list is always increasing.
  • Algorithms exist for Flash, EEPROM, FRAM, MRAM, RAM, nvRAM, and other device types.
  • Example microcontroller setups provided for: Freescale, TI, Toshiba, NXP, ST, and Spansion.

The SPI programming algorithms are divided into two separate archives, one for NXP LPC ARM devices and one for the other PEmicro-supported manufacturers (Freescale, STMicroelectronics, TI, etc.). This is because NXP LPC devices have RAM at address 10000000, whereas the rest have RAM at address 20000000. The archives may be downloaded at PEmicro's support center page for SPI algorithms.

For further information on this product, to peruse the manual with various setup examples, see a list of current algorithms, or request new algorithms, please view PEmicro's flash programming algorithm page in the Support Center.





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