Did you ever wonder how to power cycle your device to force it into Background Debug Mode? Are you trying to eliminate an external power supply from your manufacturing setup? You can accomplish either task by using a Cyclone PRO. Using the Cyclone PRO's internal power generation mechanism, you can control power for any HC08/HCS08/RS08/HC(S)12 device. Click through to read more...

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ICDPPCNEXUS, P&E’s in-circuit debugger for the MPC55xx/MPC56xx processors, uses reset scripts to properly initialize the device when it comes out of reset. In this post we discuss why these reset scripts are necessary and also analyze the contents of these scripts in detail. Click through for more.

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In a previous post, we showed how to use PKGPPCNEXUS and  PKGCFZ_PRO to display the contents of an ELF/DWARF file using Readelf.  In this post, we look at the Readelf output and explain its description of your object code. 

We will use this example Readelf output to illustrate the kinds of information that Readelf provides. Click through to view the example and follow along.

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Certain test procedures and production environments require the use of a cable longer than the typical 9-inch flat ribbon cable typically included with P&E hardware interfaces. Extending the cable length requires special considerations for signal integrity, crosstalk, and electromagnetic interference. Simply using a longer cable without understanding these topics will usually produce a setup that does not work reliably, if at all.

If it is necessary to use a longer cable, P&E recommends using a shielded jacketed cable . This cable configuration is excellent at reducing crosstalk as well as minimizing electromagnetic interference from other devices. Further improvement can be obtained if the wires are also arranged in twisted pairs. Shielded USB cables are inexpensive and easy to rework. The four wires provided can be used to create a cable for the standard 6-pin BDM header used by many Freescale microprocessors.

In general, these guidelines should be followed for all cables between the target microprocessor and the P&E hardware interface:

1. Use the shortest cable possible

    

2. Use shielded cable configurations to reduce parasitic effects

    

3. Lower the communication frequency.

For certain architectures, this can be configured in software by the user. For other architectures, the communication speed is only dependent on the processor's bus frequency. Reducing the bus frequency (ie. disabling the PLL) should improve results.

For time-sensitive HCS08/RS08 applications the developer often needs to trim the internal reference clock in order to generate a desired bus frequency. P&E's HCS08 and RS08 Flash Programmers provide a command called “Program Trim” that allows developers to program a pre-calculated value to the non-volatile flash locations that are reserved for storing ICSTRM and ICSSC registers. These can then be loaded at run-time.

Click through to view a demonstration of how the “Program Trim” command can be used to generate a bus frequency of 8 MHz on a 9S08QE128 microcontroller...

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